HEF40098B データシートの表示（PDF） - NXP Semiconductors.
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HEF40098B Datasheet PDF : 12 Pages
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NXP Semiconductors
HEF40098B
3-state hex inverting buffer
6.2 Pin description
Table 2. Pin description
Symbol
Pin
1OE
1
1A0, 1A1, 1A2, 1A3 2, 4, 6, 10
1Y0, 1Y1, 1Y2, 1Y3 3, 5, 7, 9
VSS
2Y0, 2Y1
8
13, 11
2A0, 2A1
14, 12
2OE
15
VDD
16
Description
output enable input (active LOW)
buffer input
buffer output (active LOW)
supply voltage
buffer output (active LOW)
buffer input
output enable input (active LOW)
supply voltage
7. Functional description
Table 3.
Inputs
nAn
H
L
X
Function table[1]
nOE
L
L
H
Output
nYn
L
H
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF state.
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
VDD
IIK
VI
IOK
II/O
IDD
Tstg
Tamb
Ptot
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
Tamb = −40 to +85 °C
DIP16 package
SO16 package
P
power dissipation
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C.
Min
−0.5
-
−0.5
-
-
-
−65
−40
[1] -
[2] -
-
Max
Unit
+18
V
±10
mA
VDD + 0.5 V
±10
mA
±10
mA
50
mA
+150
°C
+85
°C
750
mW
500
mW
100
mW
HEF40098B_5
Product data sheet
Rev. 05 — 31 October 2008
© NXP B.V. 2008. All rights reserved.
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