M51996AP データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M51996AP

SWITCHING REGULATOR CONTROL

MITSUBISHI ELECTRIC  

Current limiting circuit

(1)Peripheral circuit of CLM+ terminal

Fig.25 shows the example circuit diagrams around the CLM+

terminal.It is required to connect the low pass filter,in order to

reduce the spike current component,as the main current or

drain current contains the spike current especially during the

turn-on duration of MOS-FIT.

1,000pF to 22,000pF is recommended for CNF and the RNF1

and RNF2 have the functions both to adjust the "current-

detecting-sensitivity" and to consist the low pass filter.

R1

CFIN

INPUT

SMOOTHING

CAPACITOR

Vcc COLLECTOR

M51996A

VOUT

Cvcc

GND

CLM+

EMITTER

CNF

RNF1

RNF2 RCLM

Fig.25 Peripheral circuit diagram of CLM+ terminal

To design the RNF1 and RNF2,it is required to consider the

influence of CLM+ terminal source current(IINCLM+),

which value is in the range of 90 to 270µA.

In order to be not influenced from these resistor paralleled value

of RNF1 and RNF2,(RNF1/RNF2)is recommended to be less than

100Ω.

The RCLM should be the non-inductive resistor.

(2)Over current limiting curve

(a)In case of feed forward system

Fig.26 shows the primary and secondary current wave-forms

under the current limiting operation.

At the typical application of pulse by pulse primary current

detecting circuit,the secondary current depends on the primary

current.As the peak value of secondary current is limited to

specified value,the characteristics curve of output voltage

versus output current become to the one as shown in Fig.27.

MITSUBISHI (Dig./Ana. INTERFACE)

M51996AP/FP

SWITCHING REGULATOR CONTROL

I2

CLM

RCLM

I1

(a) Feed forward system

IP1

I1

IP2

I2

(b) Primary and secondary current

Fig.26 Primary and secondary current waveforms

under the current limiting operation

condition on feed forward system

OUTPUT CURRENT

Fig.27 Over current limiting curve on feed forward

system

The demerit of the pulse by pulse current limiting system is that

the output pulse width can not reduce to less than some value

because of the delay time of low pass filter connected to the

CLM+ terminal and propagation delay time TPDCLM from CLM+

terminal to output terminal of type M51996A.The typical

TPDCLM+ is 100ns.

As the frequency becomes higher,the delay time must be

shorter.And as the secondary output voltage becomes

higher,the dynamic range of on-duty must be wider;it means

that it is required to make the on-duration much more narrower.

So this system has the demerit at the higher oscillating

frequency and higher output voltage applications.

To prevent that the SOFT terminal is used to lower the

frequency when the curve starts to become vertical.

( 17 / 22 )

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