88ALP01 データシートの表示（PDF） - Marvell Semiconductor
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88ALP01 Datasheet PDF : 160 Pages
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88ALP01
Datasheet
3
Register Description ................................................................................................................... 55
3.1
Registers Introduction .....................................................................................................................................55
3.1.1 Register Conventions .......................................................................................................................55
3.2
PCI Configuration Register File.......................................................................................................................56
3.2.1 Configuration Data Access ...............................................................................................................56
3.2.2 PCI Header Region...........................................................................................................................57
3.2.2.1 Vendor ID Register .............................................................................................................60
3.2.2.2 Device ID Register .............................................................................................................60
3.2.2.3 Command Register ............................................................................................................60
3.2.2.4 Status Register ...................................................................................................................62
3.2.2.5 Revision ID Register...........................................................................................................63
3.2.2.6 Class Code Register ..........................................................................................................63
3.2.2.7 Cache Line Register ...........................................................................................................64
3.2.2.8 Latency Timer Register ......................................................................................................64
3.2.2.9 Header Type Register ........................................................................................................65
3.2.2.10 Built-in Self Test Register ...................................................................................................65
3.2.2.11 Base Address Register (1st) ..............................................................................................65
3.2.2.12 Subsystem Vendor ID Register ..........................................................................................66
3.2.2.13 Subsystem ID Register.......................................................................................................66
3.2.2.14 New Capabilities Pointer ....................................................................................................67
3.2.2.15 Interrupt Line Register ........................................................................................................67
3.2.2.16 Interrupt Pin Register .........................................................................................................67
3.2.2.17 Min_Gnt Register ...............................................................................................................68
3.2.2.18 Max_Lat Register ...............................................................................................................68
3.2.2.19 Expansion ROM Base Address Register ...........................................................................68
3.2.3 Device Dependent Region ................................................................................................................68
3.2.3.1 SD Slot Information Register ..............................................................................................69
3.2.3.2 Access Control and VPD Control Registers .......................................................................69
3.2.3.3 Power Management Capability ID Register .......................................................................71
3.2.3.4 Power Management Next Item Pointer ..............................................................................71
3.2.3.5 Power Management Capabilities Register .........................................................................72
3.2.3.6 Power Management Control/Status Register .....................................................................73
3.2.3.7 Power Management Data Register ....................................................................................74
3.2.3.8 Power Management Data Table.........................................................................................74
3.2.3.9 VPD Capability ID Register ................................................................................................75
3.2.3.10 VPD Next Item Pointer .......................................................................................................75
3.2.3.11 VPD Address Register .......................................................................................................75
3.2.3.12 VPD Data Register .............................................................................................................76
3.2.3.13 VPD Serial EEPROM Loader Control Register ..................................................................76
3.2.3.14 MSI Capability ID Register (MSI Cap ID) ...........................................................................76
3.2.3.15 MSI Next Item Pointer ........................................................................................................77
3.2.3.16 MSI Message Control .........................................................................................................77
3.2.3.17 MSI Message Address .......................................................................................................78
3.2.3.18 MSI Message Data .............................................................................................................79
3.2.3.19 Calibration Control Register ...............................................................................................79
3.2.3.20 Calibration Status Register.................................................................................................80
3.2.3.21 Discard Counter Register ...................................................................................................80
3.2.3.22 Retry Counter Register.......................................................................................................80
3.3
Global Control Registers .................................................................................................................................81
3.3.1 Register Map ....................................................................................................................................81
3.3.2 Register Descriptions........................................................................................................................81
3.3.2.1 Control/Status.....................................................................................................................81
3.3.2.2 Interrupt Source Register ...................................................................................................83
3.3.2.3 Interrupt Mask Register ......................................................................................................83
Doc. No. MV-S103921-00 Rev. –
Page 6
Document Classification: Proprietary Information
Copyright © 2007 Marvell
July 17, 2007, Preliminary
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