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88ALP01 データシートの表示(PDF) - Marvell Semiconductor

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88ALP01
Marvell
Marvell Semiconductor Marvell
88ALP01 Datasheet PDF : 160 Pages
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88ALP01
PCI to NAND, SD and Camera Host Controller
Datasheet
PRODUCT OVERVIEW
Overview
The Marvell® single-chip 88ALP01 triple function device
integrates a NAND flash controller (with Reed-Solomon
ECC), an SD/SDIO controller, and a CMOS Camera
Module Interface Controller (CCIC). The device is ideally
suited for laptop computing devices and other embedded
applications.
The 88ALP01 package is optimized for 32-bit PCI
clients. The small 128-pin TQFP package with low pin
count minimizes board space, simplifies signal routing,
and reduces the number of required PCB layers,
resulting in cost-effective motherboard and low profile
system implementations.
The 88ALP01 is optimized for maximum throughput and
low PCI Bus and CPU utilization. Adequate on-chip
memory buffers enable efficient PCI bus cycles and data
buffering and eliminates the need for external memory.
Direct Memory Address (DMA)-based burst data transfer
reduces CPU and PCI bus utilization and improves
overall system performance.
General Features
PCI Interface
„ Fully compliant with PCI v2.3, 32-bit, 33 MHz
Note
66 MHz support is pending final analysis of
PCI timing.
„ Programmable cache line size
„ 3.3V signalling
„ PCI Bus master
„ Burst transfer
„ Supports DMA and PIO operations
„ Supports PCI power states
„ Supports three functions in a chip:
NAND Flash Controller
SD/SDIO controller
Standard camera interface controller
„ Each function operating independently:
Dedicated driver
Separated configuration registers
Separated buffers
Separated controls
„ All functions have host interrupt capability
„ Interrupts OR together and sent to INTAn
„ On-chip generated power-on reset
„ NAND Flash controller supports both DMA and PIO
modes
„ SD controller supports DMA and PIO modes
„ Camera interface controller supports DMA data
transfer
NAND Controller
„ Configurable to interface with different 8-bit NAND
Flash devices (Samsung and Toshiba)
„ Supports either 512 byte or 2 KB page sizes
„ Configurable to work with different single chip NAND
Flash sizes from 128 Mbit to 64 Gbit
„ Basic NAND Flash functions:
Page program/read
Block erase
Random program/read
ID read
Status read
Reset and lock
„ Supports hardware ECC (Reed-Solomon algorithm)
4 bit-symbol detection and correction
12-bit per symbol with data automatic packing
SD/SDIO
„ Supports 1-bit/4-bit SD, SDIO cards
„ Up to 48 MHz for SD
„ Supports interrupts for information exchange between
host and cards
Copyright © 2007 Marvell
July 17, 2007, Preliminary
Document Classification: Proprietary Information
Doc. No. MV-S103921-00 Rev. –
Page 3

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