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P4C164LL データシートの表示(PDF) - Semiconductor Corporation

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P4C164LL
PYRAMID
Semiconductor Corporation PYRAMID
P4C164LL Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
P4C164LL - VERY LOW POWER 8K x 8 STATIC CMOS RAM
RECOMMENDED OPERATING TEMPERATURE & SUPPLY VOLTAGE
Grade
Commercial
Industrial
Military
Ambient Temp
0°C to 70°C
-40°C to +85°C
-55°C to +125°C
Supply Voltage
4.5V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
4.5V ≤ VCC ≤ 5.5V
Maximum Ratings(1)
Symbol Parameter
VCC
VTERM
TA
STG
IOUT
ILAT
Supply Voltage with Respect to GND
Terminal Voltage with Respect to GND (up to 7.0V)
Operating Ambient Temperature
Storage Temperature
Output Current into Low Outputs
Latch-up Current
Min
Max
Unit
-0.5
7.0
V
-0.5
VCC + 0.5
V
-55
125
°C
-65
150
°C
25
mA
> 200
mA
DC ELECTRICAL CHARACTERISTICS
(Over Recommended Operating Temperature & Supply Voltage)(2)
Sym Parameter
VOH
Output High Voltage
(I/O0 - I/O7)
VOL
Output Low Voltage
(I/O0 - I/O7)
VIH Input High Voltage
Test Conditions
IOH= -1mA, VCC = 4.5V
IOL = 2.1mA
VIL Input Low Voltage
ILI Input Leakage Current
GND ≤ VIN ≤ VCC
ILO Output Leakage Current
VCC Current
ISB TTL Standby Current
(TTL Input Levels)
VCC Current
ISB1 CMOS Standby Current
(CMOS Input Levels)
GND
CE1
≤ VOUT
VIH
VCC
VCC = 5.5V, IOUT = 0 mA
CE1 = VIH or CE2 = VIL
VCC = 5.5V, IOUT = 0 mA
CE1 ≥ VCC - 0.2V or CE2 ≤ 0.2V
Min
Max Unit
2.4
V
0.4
V
2.2
VCC + 0.3 V
-0.5(3)
0.8
V
Com / Ind
-2
Military
-5
+2
µA
+5
Com / Ind
-2
Military -10
+2
µA
+10
Com / Ind
Military
100
µA
400
Com / Ind
Military
3
µA
25
Notes:
1. Stresses greater than those listed under Maximum Ratings may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to Maximum rating conditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with VIL and IIL not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
4. This parameter is sampled and not 100% tested.
Document # SRAM116 REV 04
Page 2

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