UPD720102 データシートの表示（PDF） - NEC => Renesas Technology
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UPD720102 Datasheet PDF : 36 Pages
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USB interface block
Parameter
Output pin impedance
Input Levels for Low-/full-speed:
High-level input voltage (drive)
High-level input voltage (floating)
Low-level input voltage
Differential input sensitivity
Differential common mode range
Output Levels for Low-/full-speed:
High-level output voltage
Low-level output voltage
SE1
Output signal crossover point voltage
Input Levels for High-speed:
High-speed squelch detection threshold
(differential signal)
High-speed disconnect detection threshold
(differential signal)
High-speed data signaling common mode
voltage range
High-speed differential input signaling level
Output Levels for High-speed:
High-speed idle state
High-speed data signaling high
High-speed data signaling low
Chirp J level (differential signal)
Chirp K level (differential signal)
Symbol
ZHSDRV
Conditions
VIH
VIHZ
VIL
VDI
⏐(D+) − (D−)⏐
VCM
Includes VDI range
VOH
VOL
VOSE1
VCRS
RL of 14.25 kΩ to GND
RL of 1.425 kΩ to 3.6 V
VHSSQ
VHSDSC
VHSCM
See Figure 3–2.
VHSOI
VHSOH
VHSOL
VCHIRPJ
VCHIRPK
μPD720102
Min.
Max.
Unit
40.5
49.5
Ω
2.0
V
2.7
3.6
V
0.8
V
0.2
V
0.8
2.5
V
2.8
3.6
V
0.0
0.3
V
0.8
V
1.3
2.0
V
100
150
mV
525
625
mV
−50
+500
mV
−10
360
−10
700
−900
+10
mV
440
mV
+10
mV
1100
mV
−500
mV
Data Sheet S17998EJ4V0DS
19
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