MSM9405MB データシートの表示（PDF） - Oki Electric Industry

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MSM9405MB

IrDA Communication Controller

Oki Electric Industry 

¡ Semiconductor

MSM9405

ICR1 bit

ICR1[0]

ICR1[1]

ICR1[2]

ICR1[3]

ICR1[4]

ICR1[5]

ICR1[6]

ICR1[7]

Description

TX_EN (Transmit Enable): When "1" is written to this bit, the sending mode is selected. When "0" is

written to this bit, sending terminates when data remaining in the FIFO has all been sent. In this

case, the TXE interrupt does not occur.

RX_EN (Receive Enable): When "1" is written to this bit, the receiving mode is selected. When "0" is

written to this bit, the device enters receive end mode.

S_EOT (Set End Of Transmission): This bit is valid in Extended-SIR, MIR, or FIR mode. When "1" is

written to this bit, the data written to the FIFO next time is recognized as the end of frame, and

immediately after it, the data added with CRC and EOF is sent as a frame. After a frame is sent,

this bit is automatically set to "0". To use S_EOT, TFL must be set to the maximum value or TCC

must be unused with TCC_EN = "0". This bit is not used in SIR mode.

IR_PLS (Send Interaction Pulse): This bit is valid in MIR or FIR mode. When "1" is written to

this bit, an approximately 2-ms serial infrared interaction pulse is sent immediately after the frame

being sent. After a frame is sent, this bit is automatically set to "0". This bit is not used in SIR

mode and Extended-SIR mode.

FCLR (FIFO Clear): When "1" is written to this bit, the FIFO (including the TDR and RDR) is made

empty. The FIFO threshold level does not change. The TSR and RSR are not cleared. When the

FIFO is made empty, this bit is automatically set to "0".

CRC_INV (Invert Transmitter CRC): This bit is valid in Extended-SIR, MIR, or FIR mode and is not

used in SIR mode. When "1" is written to this bit, transmission is interrupted if TXE (Transmitter

Empty) occurs. The inverted CRC and EOF are automatically added to the frame that caused TXE,

then the frame is sent. Writing "0" to this bit disables this function.

TCC_EN (TCC Enable): This bit is valid in Extended-SIR, MIR, or FIR mode. When this bit is set to

"1", the TCC is enabled. When TCC_EN is set to "0", the TCC is disabled. To use S_EOT, the TFL

must be set to the maximum value or the TCC must be disabled with TCC_EN = "0".

MS_EN (Mode Select Enable): When "1" is written to this bit, the MSM9405 performs the following

operation depending on the mode. After the operation is completed, this bit is automatically set to

"0".

If the MSM9405 is in FIR mode:

1. The SD pin is set to "H", and the Tx pin to "H".

2. Approximately 300 ns later, the SD pin is set to "L".

3. Approximately 300 ns later, the Tx pin is set to "L".

If the MSM9405 is in SIR, Extended-SIR, or MIR mode:

1. The SD pin is set to "H", and the Tx pin to "L".

2. Approximately 300 ns later, the SD pin is set to "L".

3. The Tx pin is held in the "L" level for approximately 300 ns.

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