MSM9405 データシートの表示（PDF） - Oki Electric Industry

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MSM9405

IrDA Communication Controller

Oki Electric Industry 

¡ Semiconductor

MSM9405

Registers

• TDR: Transmit Data Register (Write Only)

RDR: Receive Data Register (Read Only) (Address = 0h)

The TDR (Transmit Data Register) and RDR (Receive Data Register) are used to read/write data

directly upon receiving/sending the data. The TDR and RDR share the same address. When

data is written in the sending mode or during the idle state, the TDR works as the top of the FIFO

and 1-byte data can be written to the FIFO. When data is read in the receiving mode, the RDR

works as the bottom of the FIFO and 1-byte data in the FIFO can be read. Serial-to-parallel

conversion is performed by the RSR. Parallel-to-serial conversion is performed by the TSR.

Reading from the TDR or writing to the RDR is invalid. The contents of the FIFO and TDR/RDR

are cleard by writing "1" to FCLR in the ICR1 register. The TSR and RSR cannot be cleared.

• ENR: Enable Register (Address = 1h)

The ENR (Enable Register) is used to control enabling/disabling various interrupts on the

MSM9405. Each of eight bits corresponds to each of eight interrupts provided on the MSM9405.

Each of eight interrupts can be independently controlled by each bit. When the system is reset,

all bits are reset to "0". By writing "1" to the bit corresponding to the desired interrupt, the

specified interrupt is enabled.

ENR ENR ENR ENR ENR ENR ENR ENR

7

6

5

4

3

2

1

0

FE_IE (Enable = "1")

AS_IE (Enable = "1")

ECE_IE (Enable = "1")

OE_IE (Enable = "1")

CE_IE (Enable = "1")

MLE_IE (Enable = "1")

EOF_IE (Enable = "1")

RXH/T_IE (Enable = "1")

TXL_IE (Enable = "1")

TXE_IE (Enable = "1")

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