MBM30LV0128 データシートの表示（PDF） - Fujitsu

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MBM30LV0128

128 M (16 M × 8) BIT NAND-type

Fujitsu 

MBM30LV0128

s DEVICE BUS OPERATIONS

Table 2 Operation Table *1

Mode

CLE ALE

CE

WE

RE

SE

WP

Read Command Input

H

L

L

Mode Address Input (3 clocks)

L

H

L

H

X *4

X

H

X *4

X

During Read (Busy)

L

L

L

H

H

L/H *3

X

Sequential Read & Data Output

L

L

L

H

L/H *3

X

Program/ Command Input

H

L

L

Erase

Mode

Address Input (2 or 3 clocks)

L

H

L

H

X *4

H

H

X *4

H

Data Input

L

L

L

H

L/H *3

H

During Program (Busy)

X

X

X

X

X

L/H *3

H

During Erase (Busy)

X

X

X

X

X

X

H

Write Protect

X

X

X

X

X

X

L

Stand-by

X

X

H

X

X

0 V/VCC*2 0 V/VCC*2

*1: H : VIH, L : VIL, X : VIH or VIL

*2: WP should be biased to CMOS high or CMOS low for standby.

*3: When SE is high, spare area is deselected.

*4: If 50h command is input and read/program operation is executed only for spare area, SE must be low at the

command/address input.

Table 3 Read Mode Operation Status *

Operation

CLE ALE

CE

WE

RE

I/O0 to I/O7 Power Supply

Output Select

L

L

L

H

L

Data Output

Active

Output Deselect

L

L

L

H

H High Impedance

Active

Standby

X

X

H

X

X High Impedance Standby

*: H : VIH, L : VIL, X : VIH or VIL

8

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