AUIR3330STRL データシートの表示（PDF） - International Rectifier
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AUIR3330STRL Datasheet PDF : 30 Pages
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AUIR3330S
Design: basic schematic with microprocessor
The basic circuit is giving all the functionality to drive a 50A DC motor. RIfb set both the current shutdown and the
current feedback reading scale. The In signal provides the Pwm frequency and duty cycle order to the
AUIR3330S. D1 is the free wheeling diode during PWM operation. As the equivalent circuit between Vbat and –
Mot is 2 diode in series (the body diode of the AUIR3330S and D1), the system requires T1, D2, R1 and R2 to
sustain the reverse battery. (Cf: Typical connection with reverse battery protection).
DC to 30 kHz operation
The AUIR3330S is able to operate in DC and high speed switching operation. To be able to switch at 30 kHz, a
bootstrap capacitor is used externally. The device integrates the power supply of the bootstrap capacitor. In DC
operation, when the capacitor is discharged, the charge pump maintains the device ON.
Active di/dt control to reduce EMI and switching losses
The AUIR3330S includes a special gate drive, managing the Mosfet di/dt controlled internally, by managing the
gate voltage dynamically. This di/dt trade-off is set internally to an optimum value, between power dissipation
versus noise. This feature brings to the designer less EMI versus switching losses. The system has three phases
during the turn on sequence and three phases during the turn off sequence. First the driver injects a high current
in the gate until the gate voltage reaches the Vth. Then it injects a low current to control the di/dt value until the
gate voltage reaches the miller plate. And after it injects a high current to fully turn on quickly the MOSFET to
reduce the dv time (reducing the switching losses). The turn off sequence is the same than the turn on but in the
opposite direction: First reduce the dv time after control the di/dt and then discharge totally the gate.
On
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Vgs
Vth
Ids
VDS
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9 www.irf.com © 2012 International Rectifier
May 29, 2014
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