RF3000 データシートの表示（PDF） - RF Micro Devices

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RF3000

SPREAD-SPECTRUM BASEBAND MODEM

RF Micro Devices 

RF3000

High Gain Calibration Procedure

Calibration of an IEEE802.11b radio can be accomplished by sending a repetitive pattern to the radio at a known input

power, and adjusting the register settings until all packets are correctly received without errors or missing packets. A sim-

ple procedure is contained outlined as follows.

1. Write the six LSB's of register 21 to the value 011000 (24 decimal). This will decrease the total system gain.

2. Apply an 1Mbps IEEE802.11b signal to the input of the radio of a known input power (-75dBm).

3. Decrease the six LSB's of register 21 by one LSB until all packets are received correctly without dropping any pack-

ets.

4. Since the input power of the reference signal was set to -75dBm (to eliminate effects of thermal noise), calculate the

final register 21 setting by subtracting a known predetermined value from the value found in step 3 of the calibration

procedure.

Low Gain Calibration Procedure

Similar techniques can be applied to calibrate the Low gain settings of the RF3000. As an initial value, the register set-

ting in register 20 should be equal to the value of register 21. Register 20 is provided to allow manufacturing calibration

to account for reverse isolation variances in the T/R switch if used as an additional pad.

Post-AGC

When the Barker code is acquired, the RF3000 assigns the ACQ-bit in the mode register to a 1 and proceeds to extract

the header information. When the start frame delimiter is identified, the RF3000 will assign a 1 to the SFD-bit in the

mode register. The RF3000 will now decode the transmission mode and data length from the header, and check the

header via the 16-bit CRC. The RF3000 will then clock-out 32 bits of header information. This will be the 8-bit RX signal

field, followed by the 8-bit RX service field, and then the 16-bit RX length field. The MAC can also read these values

through the serial port registers 0x04 through 0x07.

The header data will be followed by 16 bit times of no clock transitions.

Immediately before providing data, the RF3000 will drive RX RDY High. The received data will be stable on the rising

edge of DATA CLK. In the event the header CRC is incorrect, the RF3000 will bring RX RDY high for the duration of the

packet, but no DATA CLK or RX DATA transitions will occur.

11-336

Rev A4 031216

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