M66281FP データシートの表示（PDF） - Renesas Electronics
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M66281FP Datasheet PDF : 16 Pages
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M66281FP
Switching Characteristics
Access time
Output hold time
Output enable time
Output disable time
Item
(Ta = 0 to 70°C, VCC = 2.7 to 3.6 V, GND = 0 V, unless otherwise noted)
Symbol
Min
Typ
Max
Unit
tAC
18
ns
tOH
3
ns
tOEN
3
18
ns
tODIS
3
18
ns
Timing Requirements
(Ta = 0 to 70°C, VCC = 2.7 to 3.6 V, GND = 0 V, unless otherwise noted)
Item
Symbol
Min
Typ
Max
Unit
Write clock (WCK) cycle
Write clock (WCK) "H" pulse width
tWCK
25
ns
tWCKH
11
ns
Write clock (WCK) "L" pulse width
Read clock (RCK) cycle
tWCKL
11
ns
tRCK
25
ns
Read clock (RCK) "H" pulse width
Read clock (RCK) "L" pulse width
tRCKH
11
ns
tRCKL
11
ns
Input data setup time for WCK
Input data hold time for WCK
tDS
7
ns
tDH
3
ns
Reset setup time for WCK/RCK
Reset hold time for WCK/RCK
tRESS
7
ns
tRESH
3
ns
Reset non-selection setup time for WCK/RCK
tNRESS
7
ns
Reset non-selection hold time for WCK/RCK
tNRESH
3
ns
WEB setup time for WCK
WEB hold time for WCK
tWES
tWEH
7
ns
3
ns
WEB non-selection setup time for WCK
tNWES
7
ns
WEB non-selection hold time for WCK
tNWEH
3
ns
REB setup time for RCK
REB hold time for RCK
tRES
7
ns
tREH
3
ns
REB non-selection setup time for RCK
tNRES
7
ns
REB non-selection hold time for RCK
tNREH
3
ns
Input pulse up/down time
tr, tf
20
ns
Data hold time*
tH
20
ms
Notes: Perform reset operation after turning on power supply.
* For 1 line access, the following conditions must be satisfied:
WEB high-level period ≤ 20 ms − 5120 • tWCK − WRESB low-level period
REB high-level period ≤ 20 ms − 5120 • tRCK − RRESB low-level period
REJ03F0254-0200 Rev.2.00 Sep 14, 2007
Page 5 of 15
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