ICS9248F-103 データシートの表示（PDF） - Integrated Circuit Systems

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ICS9248F-103

Frequency Generator & Integrated Buffers for PENTIUM/Pro™

Integrated Circuit Systems 

ICS9248 - 103

Byte 4: Reserved Active/Inactive Register (1 = enable, 0 = disable)

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Pin #

-

-

-

-

-

-

-

-

PWD

1

1

1

1

X

1

X

1

Description

(Reserved)

(Reserved)

(SEL24_48)#

(Reserved)

Latched FS1#

(Reserved)

Latched FS3#

(Reserved)

Byte 5: Peripheral Active/Inactive Register (1 = enable, 0 = disable)

Bit

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Pin #

34

35

37

38

26

25

48

2

PWD

1

1

1

1

1

1

1

1

Description

SDRAM3 (Act/Inact)

SDRAM2 (Act/Inact)

SDRAM1 (Act/Inact)

SDRAM0 (Act/Inact)

48MHz (Act/Inact)

24MHz (Act/Inact)

REF1 (Act/Inact)

REF0 (Act/Inact)

Notes:

1. Inactive means outputs are held LOW and are disabled from switching.

2. Latched Frequency Selects (FS#) will be inverted logic load of the input frequency select pin conditions.

6

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