CS61884 データシートの表示（PDF） - Cirrus Logic

部品番号

コンポーネント説明

一致するリスト

CS61884

Octal T1/E1/J1 Line Interface Unit

Cirrus Logic 

CS61884

3.8 JTAG Test Interface

SYMBOL

TRST

TMS

TCK

TDO

TDI

LQFP FBGA TYPE

DESCRIPTION

95

G12

JTAG Reset

I This active Low input resets the JTAG controller. This input

is pulled up internally and may be left as a NC when not

used.

96

F11

JTAG Test Mode Select Input

I This input enables the JTAG serial port when active High.

This input is sampled on the rising edge of TCK. This input

is pulled up internally and may be left as a NC when not

used.

97

F14

JTAG Test Clock

Data on TDI is valid on the rising edge of TCK. Data on

I TDO is valid on the falling edge of TCK. When TCK is

stopped high or low, the contents of all JTAG registers re-

main unchanged. Tie pin low through a 10 KΩ resistor

when not used.

JTAG Test Data Output

98

F13

O JTAG test data is shifted out of the device on this pin. Data

is output on the falling edge of TCK. Leave as NC when not

used.

99

F12

JTAG Test Data Input

I JTAG test data is shifted into the device using this pin. The

pin is sampled on the rising edge of TCK. TDI is pulled up

internally and may be left as a NC when not used.

3.9 Miscellaneous

SYMBOL

REF

LQFP FBGA TYPE

DESCRIPTION

94

H13

I Reference Input

This pin must be tied to ground through 13.3 KΩ 1% resis-

tor. This pin is used to set the internal current level.

DS485F1

21

Share Link: