CS61884 データシートの表示（PDF） - Cirrus Logic
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CS61884 Datasheet PDF : 71 Pages
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CS61884
12. OPERATIONAL SUMMARY
A brief summary of the CS61884 operations in hardware and host mode is provided in Table 7.
Table 7. Operational Summary
MCLK
Active
Active
Active
Active
Active
Active
Active
L
L
L
H
H
H
H
H
H
H
H
H
TCLK
Active
Active
Active
L
H
H
H
Active
H
L
Active
Active
Active
L
L
L
H
H
H
LOOP
Open
L
H
X
Open
L
H
X
X
X
Open
L
H
Open
L
H
Open
L
H
Receive Mode
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
RCLK/Data Recovery
Power Down
Power Down
Power Down
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Data Recovery
Transmit Mode
Unipolar/Bipolar
Unipolar/Bipolar
Unipolar/Bipolar
Power Down
TAOS
Unipolar/Bipolar
TAOS
Unipolar/Bipolar
RZ Data
Power Down
Unipolar/Bipolar
RZ Data
Unipolar/Bipolar
Power Down
RZ Data
Power Down
RZ Data
RZ Data
RZ Data
Loopback
Disabled
Remote Loopback
Analog Loopback
Disabled
Disabled
Remote Loopback
Analog Loopback
Disabled
Disabled
Disabled
Disabled
Remote Loopback
Analog Loopback
Disabled
Remote Loopback
Disabled
Disabled
Remote Loopback
Analog Loopback
12.1 Loopbacks
The CS61884 provides three loopback modes for
each port. Analog Loopback connects the transmit
signal on TTIP and TRING to RTIP and RRING.
Digital Loopback Connects the output of the En-
coder to the input of the Decoder (through the Jitter
Attenuator if enabled). Remote Loopback connects
the output of the Clock and Data Recovery block to
the input of the Pulse Shaper block. (Refer to de-
tailed descriptions below.) In hardware mode, the
LOOP[7:0] pins are used to activate Analog or Re-
mote loopback for each channel. In host mode, the
Analog, Digital and Remote Loopback registers are
used to enable these functions (Refer to the Analog
Loopback Register (01h) (See Section 14.2 on
page 35), Remote Loopback Register (02h) (See
Section 14.3 on page 35), and Digital Loopback
Reset Register (0Ch) (See Section 14.13 on
page 37).
12.2 Analog Loopback
In Analog Loopback, the output of the
TTIP/TRING driver is internally connected to the
input of the RTIP/RRING receiver so that the data
on TPOS/TNEG and TCLK appears on the
RPOS/RNEG and RCLK outputs. In this mode the
RTIP and RRING inputs are ignored. Refer to
Figure 8 on page 30. In hardware mode, Analog
Loopback is selected by driving LOOP[7:0] high.
In host mode, Analog Loopback is selected for a
given channel using the appropriate bit in the Ana-
log Loopback Register (01h) (See Section 14.2 on
page 35).
NOTE: The simultaneous selection of Analog and
Remote loopback modes is not valid. A TAOS
request overrides the data on TPOS and TNEG
during Analog Loopback. Refer to Figure 9 on
page 30.
DS485F1
29
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