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HIP1011D(1999) データシートの表示(PDF) - Intersil

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HIP1011D
(Rev.:1999)
Intersil
Intersil Intersil
HIP1011D Datasheet PDF : 15 Pages
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HIP1011D
Introduction
The HIP1011D is the first device designed to provide control
and protection of the four PCI power supplies independently
to two PCI slots. Like the widely used HIP1011 this device
complies with the PCI Hot Plug specification facilitating the
service, upgrading or expansion of PCI based servers
without the need to power down the server. The HIP1011D
protects against over current (OC) for the -12V, +12V, +3.3V,
+5V and under voltage (UV) conditions for the +12V, +3.3V,
+5V supplies.
Figure 1 illustrates the typical implementation of the
HIP1011D. Additional components for optimizing
performance for particular applications, or desired features
may be necessary.
Key Feature Description and Operation
The HIP1011D, four power MOSFETs and a few passive
components as configured in Figure 1, create a small yet
complete power control solution for two PCI slots. It provides
an OC trip level greater than the maximum PCI specified
current for each supply to each slot. Over current monitoring
and protection for the 3.3V and 5V supplies is provided by
sensing the voltage across external current-sense resistors.
For the +12V and -12V inputs, over current protection is
provided internally. On-chip references are used to monitor
the +5V, +3.3V and +12V outputs for under voltage
conditions. During an over current condition on any output,
or an under voltage condition on the +5V, +3.3V or +12V
outputs, all slot specific MOSFETs are immediately latched-
off and a LOW (0V) is presented to the appropriate FLTN
output. During initial power-up of the main VCC supply
(+12V), the PWRON inputs are inhibited from turning on the
switches, and the latch is held in the reset state until the VCC
input is greater than 10V. After a fault has been asserted and
FLTN is latched low cycling PWRON low then high will clear
the FLTN latch. User programing of the OC thresholds for
both controlled slots is provided by a single resistor
connected to the OCSET pin along with Rsense. In addition
delay time to latch off after a fault condition can be increased
by increasing the FLTN to ground capacitance and the turn-
on ramp rate can be increased by increasing the gate pin
capacitance.
Customizing Circuit Performance
Over Current (OC) Set Functionality and Resistor
Choice
The HIP1011D allows easy custom programming of the over
current (OC) levels of all 4 supplies simultaneously for both
PCI slots by simply changing the resistor value between
OCSET, (pin 10), and ground. The ROCSET value and the
OCSET 100µA current source sets a voltage that is used in
each of eight comparators, (one for each supply for both
slots). The voltages developed across the 3.3V and 5V
sense resistors are applied to the inputs of their respective
comparators. The +12V and -12V currents are sensed
internally with pilot devices. Once any comparator trips, that
output is fed through logic circuits resulting in the
appropriate FLTN, (pin 4 or pin 11), going low, indicating a
fault condition on that particular slot. Because of the internal
current monitoring of the +12V and -12V switches, their
programming flexibility is limited to ROCSET changes. The
3.3V and 5V over current trip points depend on both
ROCSET and the value chosen for each sense resistor.
Over current design guidelines and recommendations are as
follows:
1. For PCI applications, set ROCSET to 6.04k, and use
5m1% sense resistors (see Figure 24).
2. For non PCI specified applications, the following
precautions and limitations apply:
A. Do not exceed the maximum power of the integrated
NMOS and PMOS. High power dissipation must be
coupled with effective thermal management. The
integrated PMOS has an rDS(ON) of 0.3. Thus, with 1A
of steady load current on each of the PMOS devices the
power dissipation is 0.6W. The thermal impedance of the
package is 95 degrees Celsius per watt, limiting the
average DC current on the 12V supply to about 1A on
each slot and imposing an upper limit on the ROCSET
resistor. Do not use an ROCSET resistor greater than
15k.
The average current on the -12V supply should not
exceed 0.7A. Since the thermal restrictions on the +12V
supply are more severe, the +12V supply restricts the use
of the HIP1011 to applications where the ±12V supplies
draw relatively little current. Since both supplies only have
one degree of freedom, the value of ROCSET, the flexibility
of programming is quite limited. For applications where
more power is required on the +12V supply, contact your
local Intersil sales representative for information on other
Hot Plug solutions.
B. Do not try to sense voltages across the external sense
resistors that are less than 33mV. Spurious faults due to
noise and comparator input sensitivity may result. The
minimum recommended ROCSET value is 6k. This will
set the nominal OC voltage thresholds at 52mV and
42mV for the 3.3V and 5V comparators respectively. This
is the voltage level at which the OC fault (IOUT x RSENSE)
will occur.
C. Minimize VRSENSE so as to not significantly reduce the
voltage delivered to the adapter card. Remember PCB
trace and connector distribution voltage losses also need
to be considered. Make sure that the RSENSE resistor
can adequately handle the dissipated power. For best
results use a 1% precision resistor with a low temperature
coefficient.
D. Minimize external FET rDS(ON). Low rDS(ON) or multiple
MOSFETs in parallel are recommended. See Intersil for
a complete selection of MOSFET offerings.
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