HFA3860B データシートの表示（PDF） - Intersil

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HFA3860B

Direct Sequence Spread Spectrum Baseband Processor

Intersil 

HFA3860B

TX

POWER

RAMP

126 SYMBOL SYNC

SFD

2 16 SYMBOLS 16 SYMBOLS 16 SYMBOLS 16 SYMBOLS 16 SYMBOLS 16 SYMBOLS 16 SYMBOLS 7S 7S

B

A

B

A

B

A

B

16 SYMBOLS

B

JUST

MISSED

DET

ANT1

NO

SIG

FOUND

ANT2

SYMB

TIMING

DETECT

ANT1

CHECK

ANT2

DETECT

ANT1

CHECK

ANT2

VERIFY

ANT1

NOTES:

4. Worst Case Timing; antenna dwell starts before signal is full strength.

5. Time line shown assumes that antenna 2 gets insufficient signal.

FIGURE 12. DUAL ANTENNA ACQUISITION TIMELINE

SFD DET

SEED

START DATA

DESCRAMBLER

INTERNAL

SET UP TIME

TX

POWER

RAMP

2

16 SYMBOLS

16 SYMBOLS

78 SYMBOL SYNC

16 SYMBOLS

16 SYMBOLS

7 SYM 7 SYM

SFD

16 SYMBOLS

JUST

MISSED

DET

SYMB

TIMING

DETECT

VERIFY

INTERNAL

SET UP TIME

SEED

DESCRAMBLER

FIGURE 13. SINGLE ANTENNA ACQUISITION TIMELINE

SFD DET

START DATA

Procedure to Set Acq. Signal Quality Parameters

Example

There are four registers that set the acquisition signal quality

thresholds, they are: CR 8, 9, 10, and 11

(RX_SQX_IN_ACQ). Each threshold consists of two bytes,

high and low that hold a 16-bit number.

These two thresholds, bit sync amplitude CR (8 and 9) and

phase error CR (10 and 11) are used to determine if the

desired signal is present. If the thresholds are set too “low”,

that increases the probability of missing a high signal to

noise detection due to being busy processing a false alarm.

If they are set too “high”, that increases the probability of

missing a low signal to noise detection. For the bit sync

amplitude, “high” actually means high amplitude while for

phase noise “high” means low noise or high SNR.

A recommended procedure is to set these thresholds

individually optimizing each one of them to the same false

alarm rate with no desired signal present. Only the

background environment should be present, usually additive

gaussian white noise (AGWN). When programming each

threshold, the other threshold is set so that it always indicates

that the signal is present. Set register CR8 to 00h while trying

to determine the value of the phase error signal quality

threshold for registers CR 10 and 11. Set register CR10 to

FFh while trying to determine the value of the Bit sync

amplitude signal quality threshold for registers 8 and 9.

Monitor the Carrier Sense (CRS) output (TEST 6, pin 45) in

test mode 1 and adjust the threshold to produce the desired

rate of false detections. CRS indicates valid initial PN

acquisition. After both thresholds are programmed in the

device the CRS rate is a logic “and” of both signal qualities

rate of occurrence over their respective thresholds and will

therefore be much lower than either.

PN Correlators Description

There are two types of correlators in the HFA3860B

baseband processor. The first is a parallel matched

correlator that correlates for the Barker sequence used in

preamble, header, and PSK data modes. This PN correlator

is designed to handle BPSK spreading with carrier offsets up

to ±50ppm and 11 chips per symbol. Since the spreading is

BPSK, the correlator is implemented with two real

correlators, one for the I and one for the Q Channel. The

same Barker sequence is always used for both I and Q

correlators.

4-21

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