V827316K04SXTG-A1 データシートの表示（PDF） - Mosel Vitelic Corporation
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V827316K04SXTG-A1
Mosel Vitelic Corporation
V827316K04SXTG-A1 Datasheet PDF : 13 Pages
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MOSEL VITELIC
DDR SDRAM Module IDD Spec Table
A1(PC1600@CL=2)
Symbol
typical
worst
IDD0
720
760
IDD1
1000
1100
IDD2P
32
36
IDD2F
190
230
IDD2Q
120
140
IDD3P
275
320
IDD3N
420
460
IDD4R
1460
1600
IDD4W
1400
1600
IDD5
1650
1720
IDD6
Normal
18
18
Low power
9
9
IDD7
2600
2900
V827316K04S
B0(PC2100B@CL=2.5)
typical
worst
720
760
1600
1100
32
36
190
230
120
140
275
320
420
460
1400
1600
1400
1500
1650
1720
18
18
9
9
2600
2900
B1(PC2100A@CL=2)
typical
worst
640
680
900
1000
27
32
170
200
120
140
275
320
370
410
1200
1300
1200
1300
1400
1450
18
18
9
9
2200
2300
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
AC Characteristics (AC operating conditions unless otherwise noted)
(PC1600)
Parameter
Symbol Min Max
Row Cycle Time
Auto Refresh Row Cycle Time
Row Active Time
Row Address to Column Address Delay
Row Active to Row Active Delay
Column Address to Column Address Delay
Row Precharge Time
Write Recovery Time
Last Data-In to Read Command
Auto Precharge Write Recovery + Precharge Time
System Clock Cycle Time CAS Latency = 2.5
CAS Latency = 2
tRC
tRFC
tRAS
tRCD
tRRD
tCCD
tRP
tWR
tDRL
tDAL
tCK
60
-
67
-
45
120K
18
-
14
-
1
-
18
-
15
-
1
-
35
-
7
12
7.5
12
Clock High Level Width
Clock Low Level Width
Data-Out edge to Clock edge Skew
DQS-Out edge to Clock edge Skew
tCH
tCL
tAC
tDQSCK
0.45
0.45
-0.75
-0.75
0.55
0.55
0.75
0.75
(PC2100B)
Min Max
65
-
75
-
48 120K
20
-
15
-
1
-
20
-
15
-
1
-
35
-
7.5
12
10
12
0.45 0.55
0.45 0.55
-0.75 0.75
-0.75 0.75
(PC2100A)
Min Max Unit Note
70
-
ns
80
-
ns
50 120K ns
20
-
ns
15
-
ns
1
- CLK
20
-
ns
15
-
ns
1
- CLK
35
-
ns
8
12 ns
10
12 ns
0.45 0.55 CLK
0.45 0.55 CLK
-0.8 0.8 ns
-0.8 0.8 ns
V827316K04S Rev. 1.6 March 2002
8
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