UPD72871GM データシートの表示（PDF） - NEC => Renesas Technology
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UPD72871GM Datasheet PDF : 48 Pages
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PRELIMINARY DATA SHEET
MOS INTEGRATED CIRCUIT
µPD72870,72871
IEEE1394 1-CHIP OHCI HOST CONTROLLER
The µPD72870, 72871 are the LSIs which integrated OHCI-Link and PHY function into a single chip.
The µPD72870, 72871 comply with the P1394a draft 2.0 specifications and the OpenHCI IEEE1394 1.0 and work
up to 400 Mbps.
These make design so compact for PC and PC card application.
FEATURES
• Compliant with Link Layer Services as defined in 1394 Open Host Controller Interface specification release 1.0
• Compliant with Physical Layer Services as defined in P1394a draft 2.0 (Data Rate 100/200/400 Mbps)
3-port : µPD72870
1-port : µPD72871
• Compliant with protocol enhancement as defined in P1394a draft 2.0
• Modular 32-bit host interface compliant to PCI Specification release 2.1
• Support PCI-Bus Power Management Interface Specification release 1.0
• Modular 32-bit host interface compliant to Card Bus Specification
• Cycle Master and Isochronous Resource Manager capable
5
• Built-in FIFOs for isochronous transmit (1024 bytes), asynchronous transmit (1024 bytes), and receive (2048
bytes)
• 32-bit CRC generation and checking for receive/transmit packets
• 4 isochronous transmit DMAs and 4 isochronous receive DMAs supported
• 32-bit DMA channels for physical memory read/write
• Clock generation by 24.576 MHz X’tal
• Internal control and operational registers direct-mapped to PCI configuration space
• 2-wire Serial EEPROMTM interface supported
• Separate power supply Link and PHY
ORDERING INFORMATION
Part number
µPD72870GM-8ED
µPD72870F1-FA2
µPD72871GM-8ED
µPD72871 F1-FA2
Package
160-pin plastic LQFP (Fine pitch) (24 x 24 mm)
192-pin Plastic FBGA (14 x 14 mm)
160-pin plastic LQFP (Fine pitch) (24 x 24 mm)
192-pin Plastic FBGA (14 x 14 mm)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. S13925EJ2V0DS00 (2nd edition)
Date Published September 1999 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
1999
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