UPD161622 データシートの表示（PDF） - NEC => Renesas Technology

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UPD161622

396 OUTPUT TFT-LCD SOURCE DRIVER WITH RAM

NEC => Renesas Technology 

µ PD161622

5.1.5 Access to display data RAM and internal registers

When the CPU accessed the µ PD161622, the CPU only has to satisfy the requirement of the cycle time (tCYC) and

can transfer data at high speeds. Usually, it is not necessary for the CPU to take wait time into consideration.

A high-speed RAM write function, as well as the ordinary RAM write function, is provided for writing data to the

display data RAM. By using the high-speed write function, data can be written to the display RAM at an access speed

four times faster than that of the ordinary RAM write function. Therefore, applications, such as motion picture display

where the display data must be rewritten at high speeds, can be supported. For details, refer to 5.2.5 High-speed

RAM write mode

Dummy data is not required when either reading or writing data. In the µ PD161622, data of the display memory

register (R12) cannot be read. This relationship is shown in Figure 5–6.

Note that when in write mode of data at high speed for data read mode of read cycle time, this mode equals to

normal mode.

Figure 5–6. Image of internal access to display RAM

Writing

/WR

DATA

n

n+1

n+2

n+3

Reading (display memory register)

/WR

/RD

DATA

n

Dummy

n

n+1

Reading (registers other than display memory register)

/WR

/RD

DATA

IRn

IR Address

Set #n

IRn

Data

IRn Register

Data Read

n

IR Address

Set #n+1

n+1

IRn+1 Register

Data Read

20

Data Sheet S15649EJ2V0DS

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