STLC2411 データシートの表示（PDF） - STMicroelectronics

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STLC2411

BLUETOOTH™ BASEBAND

STMicroelectronics 

STLC2411

4 BLOCK DIAGRAM AND ELECTRICAL SCHEMA

Figure 2. Block Diagram and Electrical Schematic

JTAG

VDD

100nF

VDDIO

100nF

VDDIO

100nF

5

ARM7

TDMI

INTERRUPT

CONTROLLER

4

PCM

2

2

USB

PCM

EXT._INT1/2

USB

2

I2C

I2C

APB

BRIDGE

4

SPI

SPI

RF BUS

13

RADIO

I/F

BLUETOOTH®

CORE

D

M RAM

A

TIMER

START

DETECT

16

GPIO

GPIO(O..15)

8

UART

UART2

(*)

22pF

LPOCLKP

Y2

32kHz

22pF

LPOCLKN

VDDPLL

VDD

100nF

LPO

BOOT

ROM

UART

FIFO

SYSTEM

CONTROL

EMI

4

3

20

16

XIN

BOOT WAIT CSN(0..2) ADDR(0..19) DATA(0..15)

RDN/WRN

(*) If a low-power clock is available, it can be connected to the LPOCLKP pin in stead of using a crystal

2

UART

UART1

2 NRESET

SYS_CLK_REQ

D02TL550A

VDD

100nF

4/25

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