12-10 CE23T_RP=T_RCD T_RP and T_RCD timing parameter
Basic unit, 1*clock cycle
“0000” means 1 unit (1 clock cycle)
9-5 CE23T_RAS
T_RAS timing parameter
Basic unit, 1*clock cycle
“0000” means 1 unit (1 clock cycle)
4-0 CE23T_RFC
T_RFC timing parameter for refresh interval
Basic unit, 1*clock cycle
“0000” means 1 unit (1 clock cycle)
Note: The clock cycle is based memory clock.
The SDRAM timing:
RTL8181
R/W 111
R/W 11111
R/W 11111
The write access timing of flash memory:
A[20..0]
F_CE0#
OE#
Twp
Tcs
WR#
D[n..0]
CONFIDENTIAL
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v1.0