RTL8130 データシートの表示（PDF） - Realtek Semiconductor
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RTL8130 Datasheet PDF : 55 Pages
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RTL8130 Preliminary
REALTEK SINGLE CHIP
FAST ETHERNET CONTROLLER
WITH MII & AUI INTERFACE
RTL8130
1. Features:
l 160 pins QFP
l Integrated Fast Ethernet MAC, Physical chip
and transceiver in one chip
l All drivers of RTL8130 are compatible to
RTL8139A
l 10 Mb/s and 100 Mb/s operation
l Supports 10 Mb/s and 100 Mb/s N-way Auto-
negotiation operation
l PCI local bus single-chip Fast Ethernet
controller
² Compliant to PCI Revision 2.2
² Supports PCI clock 16.75MHz-40MHz
² Supports PCI target fast back-to-back
transaction
² Provides PCI bus master data transfers
and PCI memory space or I/O space
mapped data transfers of RTL8130's
operational registers
² Supports ACPI, PCI power management
l Support AUI & MII interfaces
l Medium auto-detect priority: UTP > MII in
UTP+MII application or UTP > AUI in
UTP+AUI application. UTP+MII+AUI
application is not supported.
l Auto detect the status of cable connection
l Support redundant link capability by
UTP+MII, or UTP+AUI for fault-tolerant
applications
l Supports up to 128K bytes Boot ROM
interface for both EPROM and Flash memory
l Supports 50MHz OSC as the internal clock
source. The frequency deviation of either
crystal or OSC must be within 50 PPM.
l Supports Wake-On-LAN function and remote
wake-up (Magic packet, LinkChg and
Microsoft® wake-up frame)
l Supports 4 Wake-On-LAN (WOL) signals
(active high, active low, positive pulse, and
negative pulse)
l Supports auxiliary power-on internal reset, to
be ready for remote wake-up when main
power still remains off
1999/5/30
1
Ver.1.1
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