PDI1394L21BE データシートの表示（PDF） - Philips Electronics
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PDI1394L21BE Datasheet PDF : 52 Pages
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Philips Semiconductors
1394 full duplex AV link layer controller
Preliminary specification
PDI1394L21
1.0 FEATURES
• IEEE 1394–1995 Standard Link Layer Controller
• Hardware Support for the IEC61883 International Standard of
Digital Interface for Consumer Electronics
• Interface to any IEEE 1394–1995 Physical Layer Interface
• 5V Tolerant I/Os
• Single 3.3V supply voltage
• Full-duplex isochronous operation
• Operates with 400/200/100 Mbps physical layer devices
• Dual 4K Byte FIFOs for isochronous data
• Supports single capacitor isolation mode and IEEE 1394–1995,
Annex J. isolation
• 4-field deep SYT buffer added to enhance real-time isochronous
synchronization using the AVFSYNC pin
• Generates its own AV port clocks under software control. Select
one of three frequencies: 24.576, 12.288, or 6.144 MHz
2.0 DESCRIPTION
The PDI1394L21, Philips Semiconductors Full Duplex 1394
Audio/Video (AV) Link Layer Controller, is an IEEE 1394–1995
compliant link layer controller featuring 2 embedded AV layer
interfaces. The AV layers are designed to pack and un-pack
application data packets for transmission over the IEEE 1394 bus
using isochronous data transfers. Because of its full duplex
architecture, the PDI1394L21 is capable of receiving and
transmitting isochronous data during the same bus cycle. Two 8 bit
AV ports, each with its own buffer (FIFO), receive and output
isochronous data for transmission and reception of bus packets.
Each port can be configured to receive or transmit, however, the
other port always performs the opposite function. Half duplex
operation is also permitted.
The application data is packetized according to the IEC 61883
International Standard of Interface for Consumer Electronic
Audio/Video Equipment. Both AV layer interfaces are byte-wide
ports capable of accommodating various MPEG–2 and DVC
codecs. An 80C51 compatible byte-wide host interface is provided
for internal register configuration as well as performing
asynchronous data transfers.
The PDI1394L21 is powered by a single 3.3V power supply and the
inputs and outputs are 5V tolerant. It is available in the LQFP100
and TQFP100 packages.
3.0 QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C
SYMBOL
PARAMETER
VDD
IDD
SCLK
Functional supply voltage range
Supply current @ VDD = 3.3V
Device clock
CONDITIONS
Operating
MIN
3.0
49.147
TYP
3.3
75
49.152
MAX
3.6
49.157
UNIT
V
mA
MHz
4.0 ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
100-pin plastic LQFP100
0°C to +70°C
100-pin plastic TQFP100
0°C to +70°C
OUTSIDE NORTH AMERICA
PDI1394L21BE
PDI1394L21BP
NORTH AMERICA
PDI1394L21BE
PDI1394L21BP
PKG. DWG. #
SOT407 AB15
SOT386 BB2
NOTE:
This datasheet is subject to change.
Please visit out internet website www.semiconductors.philips.com/1394 for latest changes.
1999 Aug 06
2
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