NJW1110V データシートの表示（PDF） - Japan Radio Corporation
部品番号
コンポーネント説明
一致するリスト
NJW1110V Datasheet PDF : 11 Pages
| |||
NJW1110
! DEFINITION OF I2C REGISTER
♦I2C BUS FORMAT
MSB
LSB MSB
LSB MSB
S Slave Address A Select Address A
1bit
8bit
1bit
8bit
1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
Data
8bit
LSB
AP
1bit 1bit
♦ SLAVE ADDRESS
MSB
LSB
1
0
0
1
0
1
0
R/W 94H(ADR=Low)
1
0
0
1
0
1
1
R/W 96H(ADR=High)
R/W=0: Receive Only
R/W=0: Write mode for register setting
R/W=1: Not available
♦ CONTROL REGISTER TABLE
The select address and sets each function.
The auto increment function cycles the select address as follows.
00H→01H→02H→00H
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
Variable Gain Buffer for OUT1
Input selector for OUT1
01H
Variable Gain Buffer for OUT2
Input selector for OUT2
02H
Variable Gain Buffer for OUT3
Input selector for OUT3
♦ CONTROL REGISTER DEFAULT VALUE
Control register default value is all “0”.
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
0
0
0
0
0
0
0
01H
0
0
0
0
0
0
0
0
02H
0
0
0
0
0
0
0
0
–6–
Share Link: 