NJW1110V データシートの表示（PDF） - Japan Radio Corporation

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NJW1110V

9-Input 3-Output Stereo Audio Selector

Japan Radio Corporation  

NJW1110

!CHARACTERISTICS OF BUS LINES (SDA,SCL) FOR I2C-BUS DEVICES

PARAMETER

SCL clock frequency

Hold time (repeated) START condition.

Low period of the SCL clock

High period of the SCL clock

Set-up time for a repeated START condition

Data hold time NOTE)

Data set-up time

Rise time of both SDA and SCL signals

Fall time of both SDA and SCL signals

Set-up time for STOP condition

Bus free time between a STOP and START condition

Capacitive load for each bus line

Noise margin at the Low level

Noise margin at the High level

SYMBOL

fSCL

tHD:STA

tLOW

tHIGH

tSU:STA

tHD:DAT

tSU:DAT

tr

tf

tSU:STO

tBUF

Cb

VnL

VnH

Standard mode

Fast mode

MIN. TYP. MAX. MIN. TYP. MAX.

UNIT

-

-

100

-

-

400

kHz

4.0

-

-

0.6

-

-

µs

4.7

-

-

1.3

-

-

µs

4.0

-

-

0.6

-

-

µs

4.7

-

-

0.6

-

-

µs

0

-

-

0

-

-

µs

250

-

-

100

-

-

ns

-

- 1000 -

-

300

ns

-

-

300

-

-

300

ns

4.0

-

-

0.6

-

-

µs

4.7

-

-

1.3

-

-

µs

-

-

400

-

-

400

pF

0.5

-

1

-

-

0.5

-

-

V

-

1

-

-

V

Cb ; total capacitance of one bus line in pF.

NOTE). Data hold time : tHD:DAT

Please hold the Data Hold Time (tHD:DAT) to 300ns or more to avoid status of unstable at SCL falling edge.

The SDA block in the NJW1110 does not hold data. Add external data-delay-circuit of the SDA terminal, in case of not

providing a hold time of at least 300nsec for the SDA in the master device.

The time-consists of the data-delay-circuit of the SDA terminal are as follows.

(a) Low level ! High level :

(b) High level ! Low level :

TLH ≈ RP*CD

THL ≈ RD*CD

In addition, Schottky barrier diode (SBD) influences a Low level at the Acknowledge. Therefore choose the low forward

voltage (Vf) as much as possible.

VDD

RP

MASTER

RP

SBD

SCL

SDA NJW1110

RD

CD

–5–

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