NB100LVEP56(2004) データシートの表示（PDF） - ON Semiconductor
部品番号
コンポーネント説明
一致するリスト
NB100LVEP56 Datasheet PDF : 14 Pages
| |||
NB100LVEP56
D0a
R1
R2
1
D0a
R1
D0b
R1
R2
D0b
R1
D1a
R1
R2
1
D1a
R1
D1b
R1
R2
D1b
R1
Figure 1. Logic Diagram
Q0
Q0
SEL0
R1
COM_SEL
R1
SEL1
R1
Q1
Table 2. TRUTH TABLE
SEL0
X
L
L
H
H
SEL1
X
L
H
H
L
COM_SEL
H
L
L
L
L
Q0, Q0
a
b
b
a
a
Q1, Q1
a
b
a
a
b
Q1
VCC
VEE
COM
VEE SEL0 SEL SEL1 VCC VCC
24 23 22 21 20 19
Exposed Pad
(EP)
20 19 18 17 16 15 14 13 12 11
NB100LVEP56
1 2 3 4 5 6 7 8 9 10
Figure 2. TSSOP−20 Lead Pinout (Top View)
Q0 1
Q0 2
18 VCC
17 Q1
VCC 3
D0a 4
D0a 5
NB100LVEP56
16 Q1
15 VEE
14 D1b
VBB0 6
13 D1b
7 8 9 10 11 12
D0b D0b VCC D1a D1a VBB1
Figure 3. QFN−24 Lead Pinout (Top View)
Table 3. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
(R1)
Internal Input Pullup Resistor
(R2)
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Oxygen Index: 28 to 34
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
75 kW
37 kW
> 2 kV
> 150 V
> 2 kV
Level 1
UL 94 V−0 @ 0.125 in
354 Devices
http://onsemi.com
3
Share Link: 