M80C287 データシートの表示（PDF） - Intel

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M80C287

80-BIT CHMOS III NUMERIC PROCESSOR EXTENSION

Intel 

M80C287

15 The M80C287 returns signed infinity zero as the

unmasked response to massive overflow under-

flow The M8087 and M80287 support a limited

range for the scaling factor within this range ei-

ther massive overflow underflow do not occur or

undefined results are produced

HARDWARE INTERFACE

Signal Description

In the following signal descriptions the M80C287

pins are grouped by function as follows

1 Execution control CLK CKM RESET

2 NPX handshake PEREQ PEACK BUSY

ERROR

3 Bus interface pins D15 – D0 NPWR NPRD

4 Chip Port Select NPS1 NPS2 CMD0 CMD1

5 Power supplies VCC VSS

Table 8 lists every pin by its identifier gives a brief

description of its function and lists some of its char-

acteristics Figure 8 shows the locations of pins on

the CERDIP package Table 9 helps to locate pin

identifiers in Figure 8

271092 – 5

The corresponding pins of the M80287 differ

Figure 8 CERDIP Pin Configuration

Pin Name

CLK

CKM

RESET

PEREQ

PEACK

BUSY

ERROR

D15– D0

NPRD

NPWR

NPS1

NPS2

CMD0

CMD1

VCC

VSS

Table 8 Pin Summary

Function

CLocK

ClocKing Mode

System reset

Processor Extension REQuest

Processor Extension ACKnowledge

Busy status

Error status

Data pins

Numeric Processor ReaD

Numeric Processor WRite

NPX select 1

NPX select 2

CoMmanD 0

CoMmanD 1

System power

System ground

Active

State

High

High

Low

Low

Low

High

Low

Low

Low

High

High

High

Input

Output

I

I

I

O

I

O

O

IO

I

I

I

I

I

I

I

I

12

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