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M37160EFSP/FP データシートの表示(PDF) - Renesas Electronics

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M37160EFSP/FP
Renesas
Renesas Electronics Renesas
M37160EFSP/FP Datasheet PDF : 131 Pages
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M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP
6. PERFORMANCE OVERVIEW
Table 6.1 Performance Overview
Parameter
Number of basic instructions
Instruction execution time
Clock frequency
Memory size
Input/Output
ports
ROM M37160M8-XXXSP/FP
M37160MA-XXXSP/FP
M37160MF-XXXSP/FP,M37160EFSP/FP
RAM M37160M8-XXXSP/FP
M37160MA/MF-XXXSP/FP,M37160EFSP/FP
OSD ROM
OSD RAM
P0
I/O
P10–P16
I/O
P20–P27
I/O
P30, P31
P35-P37
P50, P51
P52–P55
Serial I/O
Multi-master I2C-BUS interface
A-D comparator
PWM output circuit
Timers
ROM correction function
Subroutine nesting
Interrupt
I/O
Input
Input
Output
Clock generating circuit
Functions
71
0.451 ms (the minimum instruction execution time, at 4.43 MHz oscillation
frequency, f(XIN) = 8.86 MHz)
8.86 MHz (maximum)
32K bytes
40K bytes
60K bytes
1152 bytes (ROM correction memory included)
1472 bytes (ROM correction memory included)
20K bytes
128 bytes
8-bit 1 (N-channel open-drain output structure, can be used as 8-bit PWM
output pins, INT input pins, A-D input pin, 14-bit PWM output pins. How-
ever, CMOS output structure, when P00 is used as serial output.)
7-bit 1 (CMOS input/output structure, however, N-channel open-drain
output structure, when P11–P14 are used as multi-master I2C-BUS inter-
face, can be used as A-D input pins, timer external clock input pins, multi-
master I2C-BUS interface)
8-bit 1 (P2 is CMOS input/output structure, however, N-channel open-
drain output structure when P20 and 21 are used as serial output, can be
used as serial input/output pins, timer external clock input pins, A-D input
pins, INT input pin, sub-clock input/output pins)
2-bit 1 (CMOS input/output structure, however, N-channel open-drain out-
put structure, when used as multi-master I2C-BUS interface, can be used as
multi-master I2C-BUS interface.)
3-bit 1
2-bit 1 (can be used as OSD input pins)
4-bit 1 (CMOS output structures, can be used as OSD output pins)
8-bit 1
One (Three lines)
8 channels (7-bit resolution)
14-bit 1, 8-bit 5
8-bit 6
2 vectors
128 levels (maximum)
<16 types>
INT external interrupt 3, Internal timer interrupt 6, Serial I/O interrupt
1, OSD interrupt 1, Multi-master I2C-BUS interface interrupt 1, f(XIN)/
4096 interrupt 1, VSYNC interrupt 1, BRK instruction interrupt 1, reset
1
2 built-in circuits (externally connected to XCIN/OUT is a ceramic resonator
or a quartz-crystal oscillator)
Rev.1.01 2003.11.13 page 5 of 130

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