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M37160EFSP/FP データシートの表示(PDF) - Renesas Electronics

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M37160EFSP/FP
Renesas
Renesas Electronics Renesas
M37160EFSP/FP Datasheet PDF : 131 Pages
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M37160M8/MA/MF-XXXSP/FP,M37160EFSP/FP
FSCIN Pin
The FSCIN pin is a reference clock input pin. The main clock and
OSD clock are generated based on the reference clock from the
FSCIN pin. The sub clock can also be generated directly from the 32
kHz oscillator circuit and FSCIN pin. Refer to the clock generating
circuit shown in Figure 8.13 Clock Generating Circuit.
XCIN/XCOUT
FSCIN
(4.43MHz)
32kHz of
oscillation circuits
Generating circuit
system clock
"1"
Sub clock
f(XCIN)
"0" CC2 address 021116 bit 2
"1"
Main clock
f(XIN)
Inside system
"0" clock of switch circuit
Clock for OSD
f(OSC)
CM address 00FB16 bit 7(CM7)
f (Φ)
f(XIN) = 8.86 MHz f(OSC) = 26.58 MHz at 4.43 MHz oscillation frequency
Fig. 7.2 clock generating circuit
Rev.1.01 2003.11.13 page 11 of 130

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