M2V64S20BTP データシートの表示（PDF） - Mitsumi

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M2V64S20BTP

64M bit Synchronous DRAM

Mitsumi 

PC133 SDRAM (Rev.0.5)

Oct. '99

64M bit Synchronous DRAM

MITSUBISHI LSIs

M2V64S20BTP-6 (4-BANK x 4194304-WORD x 4-BIT)

M2V64S30BTP-6 (4-BANK x 2097152-WORD x 8-BIT)

M2V64S40BTP-6 (4-BANK x 1048576-WORD x 16-BIT)

FUNCTION TRUTH TABLE (continued)

Current State /CS /RAS /CAS /WE Address

PRE -

H

X

X

XX

CHARGING L

H

H

HX

L

H

H

L BA

L

H

L

X BA, CA, A10

L

L

H

H BA, RA

L

L

H

L BA, A10

L

L

L

HX

Op-Code,

L

L

L

L

Mode-Add

ROW

H

X

X

XX

ACTIVATING L

H

H

HX

L

H

H

L BA

L

H

L

X BA, CA, A10

L

L

H

H BA, RA

L

L

H

L BA, A10

L

L

L

HX

Op-Code,

L

L

L

L

Mode-Add

WRITE RE- H

X

X

XX

COVERING L

H

H

HX

L

H

H

L BA

L

H

L

X BA, CA, A10

L

L

H

H BA, RA

L

L

H

L BA, A10

L

L

L

HX

Op-Code,

L

L

L

L

Mode-Add

Command

Action

DESEL

NOP (Idle after tRP)

NOP

NOP (Idle after tRP)

TBST

ILLEGAL*2

READ / WRITE ILLEGAL*2

ACT

ILLEGAL*2

PRE / PREA NOP*4 (Idle after tRP)

REFA

ILLEGAL

MRS

ILLEGAL

DESEL

NOP (Row Active after tRCD)

NOP

NOP (Row Active after tRCD)

TBST

ILLEGAL*2

READ / WRITE ILLEGAL*2

ACT

ILLEGAL*2

PRE / PREA ILLEGAL*2

REFA

ILLEGAL

MRS

ILLEGAL

DESEL

NOP

NOP

NOP

TBST

ILLEGAL*2

READ / WRITE ILLEGAL*2

ACT

ILLEGAL*2

PRE / PREA ILLEGAL*2

REFA

ILLEGAL

MRS

ILLEGAL

MITSUBISHI ELECTRIC

9

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