MITSUBISHI 〈DIGITAL ASSP〉
M66256FP
OPERATING TIMING
• Write cycle
WCK
Cycle n
Cycle n+1
Cycle n+2
tWCK
tWCKH tWCKL tWEH tNWES
5120 × 8-BIT LINE MEMORY (FIFO)
Disable cycle
Cycle n+3
Cycle n+4
tNWEH tWES
WE
tDS tDH
tDS tDH
Dn
(n)
( n+1)
(n+2)
(n+3)
(n+4)
WRES = “H”
• Write reset cycle
WCK
WRES
Dn
Cycle n–1
Cycle n
Reset cycle
tWCK
tNRESH tRESS
tDS tDH
tDS tDH
(n–1)
(n)
Cycle 0
Cycle 1
Cycle 2
tRESH tNRESS
(0)
(1)
(2)
WE = “L”
5