LXT972M データシートの表示（PDF） - Intel

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LXT972M

Single-Port 10/100 Mbps PHY Transceiver

Intel 

Intel® LXT972M Single-Port 10/100 Mbps PHY Transceiver

Table 9 lists signal descriptions of the LXT972M Transceiver power, ground, and no-connect pins.

Table 9. Intel® LXT972M Transceiver Power, Ground, No-Connect Signal Descriptions

LQFP

Pin#

13

5, 9, 24,

25, 30,

38

Symbol

GNDA

GND

6, 29

VCCIO

16

VCCA

39

VCCD

7, 8

NC

Type

Signal Description

–

Analog Ground.

Ground Input/Output.

–

Ground return for digital I/O circuits (VCCIO).

MII Power.

Requires either a 3.3 V or a 2.5 V supply. Must be supplied

–

from the same source used to power the MAC on the other

side of the MII.

For the LXT972M Transceiver, VCCIO is 3.3 V.

Analog Power.

–

Requires a 3.3 V power supply.

Digital Power.

–

Requires a 3.3 V power supply.

No Connection.

–

These pins are not used and must not be terminated.

Table 10 lists signal descriptions of LXT972M Transceiver Joint Test Action Group (JTAG) pins.

Note: If a JTAG port is not used, these pins do not need to be terminated.

Table 10. Intel® LXT972M Transceiver JTAG Test Signal Descriptions

LQFP

Pin#

Symbol

Type

Signal Description

19 TDI

20 TDO

21 TMS

22 TCK

23 TRST_L

Test Data Input.

I

Test data sampled with respect to the rising edge of TCK.

Test Data Output.

O

Test data driven with respect to the falling edge of TCK.

I

Test Mode Select.

Test Clock.

I

Clock input for boundary scan.

Test Reset.

I

This active-low test reset input is sourced by ATE.

Datasheet

19

Document Number: 302875-005

Revision Date: 27-Oct-2005

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