IDT82V2088 データシートの表示（PDF） - Integrated Device Technology

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IDT82V2088

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

Integrated Device Technology 

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

INDUSTRIAL

TEMPERATURE RANGES

2 PIN DESCRIPTION

Table-1 Pin Description

Name

Type

TTIP1

TTIP2

TTIP3

TTIP4

TTIP5

TTIP6

TTIP7

TTIP8

TRING1

TRING2

TRING3

TRING4

TRING5

TRING6

TRING7

TRING8

RTIP1

RTIP2

RTIP3

RTIP4

RTIP5

RTIP6

RTIP7

RTIP8

Output

Analog

Input

Analog

Pin No.

Description

PQFP208 PBGA208

Transmit and Receive Line Interface

164

A13

TTIPn1/TRINGn: Transmit Bipolar Tip/Ring for Channel 1~8

177

A8

These pins are the differential line driver outputs and can be set to high impedance state globally or

184

C8

individually. A logic high on THZ pin turns all these pins into high impedance state. When THZ bit

197

A3

(TCF1, 03H...)2 is set to ‘1’, the TTIPn/TRINGn in the corresponding channel is set to high impedance

64

T3

state.

77

P8

84

T8

In summary, these pins will become high impedance in the following conditions:

97

T13

• THZ pin is high: all TTIPn/TRINGn enter high impedance;

163

B13

• THZn bit is set to 1: the corresponding TTIPn/TRINGn become high impedance;

• Loss of MCLK: all TTIPn/TRINGn pins become high impedance;·

178

183

B8

D8

• Loss of TCLKn: the corresponding TTIPn/TRINGn become HZ (exceptions: Remote Loopback;

Transmit internal pattern by MCLK);

198

63

B3

R3

• Transmitter path power down: the corresponding TTIPn/TRINGn become high impedance;

• After software reset; pin reset and power on: all TTIPn/TRINGn enter high impedance.

78

N8

83

R8

98

R13

169

C11 RTIPn/RRINGn: Receive Bipolar Tip/Ring for Channel 1~8

172

A11 These pins are the differential line receiver inputs.

189

C5

192

A5

69

T5

72

P5

89

T11

92

P11

RRING1

RRING2

RRING3

RRING4

RRING5

RRING6

RRING7

RRING8

168

D11

173

B11

188

D5

193

B5

68

R5

73

N5

88

R11

93

N11

Notes:

1. The footprint ‘n’ (n = 1~8) represents one of the eight channels.

2. The name and address of the registers that contain the preceding bit. Only the address of channel 1 register is listed, the rest addresses are represented by ‘...’. Users can find

these omitted addresses in the Register Description section.

10

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