IDT70V24L20GI データシートの表示（PDF） - Integrated Device Technology

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IDT70V24L20GI

HIGH-SPEED 3.3V 4K x 16 DUAL-PORT STATIC RAM

Integrated Device Technology 

IDT70V24S/L

High-Speed 4K x 16 Dual-Port Static RAM

Pin Configurations(1,2,3) (con't.)

Industrial and Commercial Temperature Ranges

63

11 I/O7L

61

I/O5L

60

I/O4L

58

I/O2L

55

I/O0L

54

OEL

51

48

SEML LBL

46

A11L

45

A10L

42

A7L

66

64

10 I/O10L I/O8L

62

59

I/O6L I/O3L

56

I/O1L

49

UBL

50

CEL

47

N/C

44

A9L

43

A8L

40

A5L

67

65

09 I/O11L I/O9L

57

GND

53

VCC

52

R/W L

41

A6L

39

A4L

69

68

08 I/O13L I/O12L

38

A3L

37

A2L

72

71

73

07 I/O15L I/O14L VCC

75

70

74

06 I/O0R GND GND

76

77

78

05 I/O1R I/O2R VCC

IDT70V24G

G84-3(4)

84-Pin PGA

Top View(5)

33

35

BUSYL A0L

34

IN T L

32

31

GND M/S

36

A1L

28

A0R

29

INTR

30

BUSYR

79

80

04 I/O3R I/O4R

26

A2R

27

A1R

81

83

03 I/O5R I/O7R

7

GND

11

12

GND SEMR

23

A5R

25

A3R

82

1

2

5

8

10

14

02 I/O6R I/O9R I/O10R I/O13R I/O15R R/W R UBR

17

A11R

20

A8R

22

A6R

24

A4R

84

3

4

6

9

15

01 I/O8R I/O11R I/O12R I/O14R OER LBR

13

CER

16

N/C

18

A10R

19

A9R

21

A7R

A

B

C

D

E

Index

NOTES:

1. All VCC pins must be connected to power supply.

2. All GND pins must be connected to ground supply.

3. Package body is approximately 1.12 in x 1.12 in x .16 in.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part-marking.

F

G

H

J

K

L

2911 drw 04

Pin Names

Left Port

Right Port

CEL

CER

R/WL

R/WR

OEL

OER

A0L - A11L

A0R - A11R

I/O0L - I/O15L

I/O0R - I/O15R

SEML

SEMR

UBL

UBR

LBL

LBR

INTL

INTR

BUSYL

BUSYR

M/S

VCC

GND

6.342

Names

Chip Enable

Read/Write Enable

Output Enable

Address

Data Input/Output

Semaphore Enable

Upper Byte Select

Lower Byte Select

Interrupt Flag

Busy Flag

Master or Slave Select

Power

Ground

2911 tbl 01

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