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IDT7024 データシートの表示(PDF) - Integrated Device Technology

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IDT7024
IDT
Integrated Device Technology IDT
IDT7024 Datasheet PDF : 22 Pages
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IDT7024S/L
High-Speed 4K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Description
The IDT7024 is a high-speed 4Kx 16 Dual-Port Static RAM. The
IDT7024 is designed to be used as a stand-alone 64K-bit Dual-Port RAM
or as a combination MASTER/SLAVE Dual-Port RAM for 32-bit or more
word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach
in 32-bit or wider memory system applications results in full-speed, error-
free operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by chip enable (CE) permits the on-chip circuitry of each
port to enter a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 750mW of power. Low-power (L)
versions offer battery backup data retention capability with typical power
consumption of 500µW from a 2V battery.
The IDT7024 is packaged in a ceramic 84-pin PGA, an 84-pin Flatpack
and PLCC, and a 100-pin TQFP. Military grade product is manufactured
in compliance with the latest revision of MIL-PRF-38535 QML, making it
ideally suited to military temperature applications demanding the highest
level of performance and reliability.
Pin Configurations(1,2,3)
INDEX
11/06/01
I/O8L
I/O9L
I/O10L
I/O11L
I/O12L
I/O13L
GND
I/O14L
I/O15L
VCC
GND
I/O0R
I/O1R
I/O2R
VCC
I/O3R
I/O4R
I/O5R
I/O6R
I/O7R
I/O8R
11 10 9 8 7 6 5 4 3 2 1 84 83 82 81 80 79 78 77 76 75
12
74
13
73
14
72
15
71
16
70
17
69
18
68
19
IDT7024J or F
J84-1(4)
67
20
F84-2(4)
66
21
65
22
84-Pin PLCC / Flatpack
Top View(5)
64
23
63
24
62
25
61
26
60
27
59
28
58
29
57
30
56
31
55
32
54
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
A7L
A6L
A5L
A4L
A3L
A2L
A1L
A0L
INTL
BUSYL
GND
M/S
BUSYR
INTR
A0R
A1R
A2R
A3R
A4R
A5R
A6R
Ind, ex
2740 drw 02
11/06/01
NOTES:
1. All VCC pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. J84-1 package body is approximately 1.15 in x 1.15 in x .17 in.
F84-2 package body is approximately 1.17 in x 1.17 in x .11 in.
PN100-1 package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
N/C
N/C
N/C
N/C
I/O10L
I/O11L
I/O12L
I/O13L
GND
I/O14L
I/O15L
VCC
GND
I/O0R
I/O1R
I/O2R
VCC
I/O3R
I/O4R
I/O5R
I/O6R
N/C
N/C
N/C
N/C
1 10099 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 7765
2
74
3
73
4
72
5
71
6
70
7
69
8
68
9
67
10
66
11
IDT7024PF
65
12
PN100-1(4)
64
13
100-Pin TQFP
63
14
15
Top View(5)
62
61
16
60
17
59
18
58
19
57
20
56
21
55
22
54
23
53
24
52
25
51
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
N/C
N/C
N/C
N/C
A5L
A4L
A3L
A2L
A1L
A0L
INTL
BUSYL
GND
M/S
BUSYR
INTR
A0R
A1R
A2R
A3R
A4R
N/C
N/C
N/C
N/C
,
2740 drw 03
6.242

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