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IDT2309B データシートの表示(PDF) - Integrated Device Technology

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IDT2309B
IDT
Integrated Device Technology IDT
IDT2309B Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
IDT2309B
3.3V ZERO DELAY CLOCK BUFFER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
(1,2)
SWITCHING CHARACTERISTICS (2309B-1) - INDUSTRIAL
Symbol
Parameter
Conditions
Min. Typ. Max. Unit
t1
Output Frequency
10pF Load
10
— 133 MHz
30pF Load
10
— 100
Duty Cycle = t2 ÷ t1
Measured at 1.4V, FOUT = 66.66MHz
40
50 60 %
t3
Rise Time
Measured between 0.8V and 2V
— 2.5 ns
t4
Fall Time
Measured between 0.8V and 2V
— 2.5 ns
t5
Output to Output Skew
All outputs equally loaded
— 250 ps
t6A
Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2
0 ±350 ps
t6B
Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 in PLL bypass mode (IDT2309B only) 1
5 8.7 ns
t7
Device-to-Device Skew
Measured at VDD/2 on the CLKOUT pins of devices
0 700 ps
tJ
Cycle-to-Cycle Jitter
Measured at 66.66MHz, loaded outputs
50 175 ps
tLOCK PLL Lock Time
Stable power supply, valid clock presented on REF pin
1 ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
SWITCHING CHARACTERISTICS (2309B-1H) - INDUSTRIAL(1,2)
Symbol
t1
Parameter
Output Frequency
Duty Cycle = t2 ÷ t1
Conditions
10pF Load
30pF Load
Measured at 1.4V, FOUT = 66.66MHz
Min. Typ. Max. Unit
10
133 MHz
10
100
40
50
60 %
Duty Cycle = t2 ÷ t1
Measured at 1.4V, FOUT <50MHz
45
50
55 %
t3
Rise Time
Measured between 0.8V and 2V
1.5 ns
t4
Fall Time
Measured between 0.8V and 2V
1.5 ns
t5
Output to Output Skew
All outputs equally loaded
250 ps
t6A
Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2
t6B
Delay, REF Rising Edge to CLKOUT Rising Edge Measured at VDD/2 in PLL bypass mode (IDT2309B only) 1
0
±350 ps
5
8.7 ns
t7
Device-to-Device Skew
Measured at VDD/2 on the CLKOUT pins of devices
0
700 ps
t8
Output Slew Rate
Measured between 0.8V and 2V using Test Circuit 2
1
— V/ns
tJ
Cycle-to-Cycle Jitter
Measured at 66.66MHz, loaded outputs
175 ps
tLOCK PLL Lock Time
Stable power supply, valid clock presented on REF pin
1 ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
5

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