HSP43124PC-33 データシートの表示（PDF） - Intersil

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HSP43124PC-33

Serial I/O Filter

Intersil 

HSP43124

halts at the 128th register location, and writing is disabled.

The coefficient address pointer is reset when any other

configuration register is written or read. NOTE: A new

coefficient set may be loaded during a filter calculation

at the risk of corrupting output data until the load is

complete.

WR

A0-2

C0-7

LSB

A0-2 = 010 (BINARY)

MSB LSB

MSB

FIRST COEFFICIENT SECOND COEFFICIENT

FIGURE 3. COEFFICIENT LOADING

The number of coefficients that must be loaded is dependent

on whether the coefficient set exhibits even symmetry, odd

symmetry, or asymmetry (see Figure 4).

ODD LENGTH

EVEN SYMMETRIC

POINT

OF

SYMMETRY

EVEN LENGTH

NOTE: Filters with even symmetric coefficients exhibit symme-

try about the center of the coefficient set. Most FIR filters have

coefficients which are symmetric in nature.

ODD SYMMETRIC

0.5

0.1

CENTER OF

COEFFICIENT SET

0.25

-0.25

-0.1

-0.5

NOTE: Odd symmetric coefficients have a coefficient envelope

which has the characteristics of an odd function (i.e. coeffi-

cients which are equidistant from the center of the coefficient

set are equal in magnitude but opposite in sign). Coefficients

designed to function as a differentiator or Hilbert Transform ex-

hibit these characteristics.

ASYMMETRIC

NOTE: Asymmetric Coefficient sets exhibit no symmetry.

FIGURE 4. COEFFICIENT CHARACTERISTICS

For filters that exhibit either even or odd symmetry, only the

unique half of the coefficient set must be loaded. The

coefficients are loaded in order starting with the first filter tap

and ending with the center tap. The coefficient associated

with the first tap is the first to be multiplied by an incoming

data sample as shown in Figure 5. For even/odd symmetric

filters of length N, N/2 coefficients must be loaded if the filter

length is even, and (N+1)/2 coefficients must be loaded if the

filter length is odd. For example, a 17 tap symmetric filter

would require the loading of 9 coefficients. Enough storage

is provided for a 256 tap symmetric filter.

X2

X(n) INPUT

X1

Z -1

X0

Z -1

C0

FIRST

FILTER TAP

C1

C2

+

LAST

FILTER TAP

Y(n) = C0X2 + C1X1 + C2X0

Y(n) OUTPUT

FIGURE 5. THREE TAP TRANSVERSAL FILTER

ARCHITECTURE

For asymmetric filters the entire coefficient set must be

loaded. The coefficients are loaded in order starting with the

first tap and ending with the final filter tap (see Figure 5 for

tap/coefficient association). Enough storage is provided for a

128 tap asymmetric filter. For asymmetric filters the value

loaded into the Programmable Filter Length Register

addressed must be twice the actual number of coefficients.

Reading Coefficients

The coefficients are read from the storage registers one byte

at a time via C0-7 as shown in Figure 6. To read the

coefficients, the user first sets the Coefficient Read Enable

bit to 1 (bit 4 of Filter Configuration Control Register). Setting

this bit resets the RAM read pointer and disables the RAM

from being written. Next, with A2-0 = 010, multiple “high” to

“low” transitions of RD, output the coefficients on C0-7, one

byte at a time, in the order they were written. NOTE: RD

should not be “low” when WR is “low”.

RD

A0-2

A0-2 = 010 (BINARY)

C0-7

LSB

MSB LSB

MSB

FIRST COEFFICIENT SECOND COEFFICIENT

FIGURE 6. COEFFICIENT READING

Data Input

Data is serially input to the HSP43124 through the DIN input.

On the rising edge of SCLK, the bit value present at DIN is

clocked into the Variable Length Shift Register. The

beginning of a serial data word is designated by asserting

SYNCIN “high” one SCLK prior to the first data bit as shown

6

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