HFA3824A データシートの表示（PDF） - Intersil

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HFA3824A

Direct Sequence Spread Spectrum Baseband Processor

Intersil 

HFA3824A

I

A/D

SECTION

CORRELATOR

16TAP

Q

A/D

SECTION

CORRELATOR

16TAP

MAGNITUDE AND

PHASE DISTRIBUTION

SYMBOL

TIMING

SIGNAL QUALITY 1

SYMBOL TIMING

TIMING

CONTROL

PHASE

ROTATE

PSK

DEMOD

DIF

DEC

DATA

DESCRAM

RXD

PHASE

ERROR

ABS

AVG SIGNAL QUALITY 2

PHASE

ERROR

NCO

LEAD

/LAG

FILTER

AVG

PHASE

FREQ.

FIGURE 13. DEMODULATOR BLOCK DIAGRAM

Acquisition Description

The PRISM baseband processor uses either a dual antenna

mode of operation for compensation against multipath inter-

ference losses or a single antenna mode of operation with

faster acquisition times.

Two Antenna Acquisition

During the 2 antenna (diversity) mode the two antennas are

scanned in order to find the one with the best representation

of the signal. This scanning is stopped once a suitable signal

is found and the best antenna is selected.

A projected worst case time line for the acquisition of a signal in

the two antenna case is shown in Figure 14. The synchroniza-

tion part of the preamble is 128 symbols long followed by a 16-bit

SFD. The receiver must scan the two antennas to determine if a

signal is present on either one and, if so, which has the better

signal. The timeline is broken into 16 symbol blocks (dwells) for

the scanning process. This length of time is necessary to allow

enough integration of the signal to make a good acquisition deci-

sion. This worst case time line example assumes that the signal

is present on antenna A1 only (A2 is blocked). It further assumes

that the signal arrives part way into the first A1 dwell such as to

just barely miss detection. The signal and the scanning process

are asynchronous and the signal could start anywhere. In this

timeline, it is assumed that all 16 symbols are present, but they

were missed due to power amplifier ramp up. Since A2 has

insufficient signal, the first A2 dwell after the start of the pream-

ble also fails detection. The second A1 dwell after signal start is

successful and a symbol timing measurement is achieved.

Meanwhile signal quality and signal frequency measure-

ments are made simultaneous with symbol timing measure-

ments. When the bit sync level, SQ1, and Phase variance

SQ2 are above their user programmable thresholds, the sig-

nal is declared present for the antenna with the best signal.

More details on the Signal Quality estimates and their

programmability are given in the Acquisition Signal Quality

Parameters section of this document.

At the end of each dwell, a decision is made based on the rel-

ative values of the signal qualities of the signals on the two

antennas. In the example, antenna A1 is the one selected, so

the recorded symbol timing and carrier frequency for A1 are

used thereafter for the symbol timing and the PLL of the NCO

to begin carrier de-rotation and demodulation.

Prior to initial acquisition the NCO was inactive and DPSK

demodulation processing was used. Carrier phase measure-

ment are done on a symbol by symbol basis afterward and

coherent DPSK demodulation is in effect. After a brief setup

time as illustrated on the timeline of Figure 14, the signal

begins to emerge from the demodulator.

If the descrambler is used it takes 7 more symbols to seed

the descrambler before valid data is available. This occurs in

time for the SFD to be received. At this time the demodulator

is tracking and in the coherent PSK demodulation mode it

will no longer scan antennas.

One Antenna Acquisition

When only one antenna is being used, the user can delete the

antenna switch and shorten the acquisition sequence. Figure

15 shows the single antenna acquisition timeline. It uses a 78

symbol sequence with 2 more for power ramping of the RF

front of the radio. This scheme deletes the second antenna

dwells but performs the same otherwise. It verifies the signal

after initial detection for lower false alarm probability.

Acquisition Signal Quality Parameters

Two measures of signal quality are used to determine acqui-

sition and drop lock decisions. The first method of determin-

ing signal presence is to measure the correlator output (or

bit sync) amplitude. This measure, however, flattens out in

the range of high BER and is sensitive to signal amplitude.

The second measure is phase noise and in most BER sce-

narios it is a better indication of good signals plus it is insen-

sitive to signal amplitude. The bit sync amplitude and phase

noise are integrated over each block of 16 symbols used in

acquisition or over blocks of 128 symbols in the data demod-

2-117

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