I2C Timing Specifications (Continued)
Guaranteed by design.
Symbol
Parameter
tFCL SCL Fall Time
tRCL1
Rise Time of SCL after a Repeated
START Condition and after ACK Bit
tRDA SDA Rise Time
tFDA SDA Fall Time
tSU;STO Stop Condition Setup Time
CB Capacitive Load for SDA and SCL
Conditions
Standard Mode
Fast Mode
Fast Mode Plus
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
Fast Mode Plus
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
Fast Mode Plus
High-Speed Mode, CB < 100pF
High-Speed Mode, CB < 400pF
Standard Mode
Fast Mode
Fast Mode Plus
High-Speed Mode
Min. Typ.
20+0.1CB
20+0.1CB
20+0.1CB
10
20
10
20
20+0.1CB
20+0.1CB
20+0.1CB
10
20
20+0.1CB
20+0.1CB
20+0.1CB
10
20
4
600
120
160
Max.
300
300
120
40
80
80
160
1000
300
120
80
160
300
300
120
80
160
400
Units
ns
ns
ns
ns
μs
ns
ns
ns
pF
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
8
www.fairchildsemi.com