FAN5365UC06X データシートの表示（PDF） - Fairchild Semiconductor
部品番号
コンポーネント説明
一致するリスト
FAN5365UC06X Datasheet PDF : 24 Pages
| |||
Pin Configuration
A1
A2
A3
A3
A2
A1
B1
B2
B3
B3
B2
B1
C1
C2
C3
C3
C2
C1
Bumps Facing Down
Figure 2. WLCSP-09, 0.4mm Pitch
Bumps Facing Up
Pin Definitions
Pin #
A1
A2
A3
B1
B2
B3
C1
C2
C3
Name Description
VSEL
Voltage Select. When HIGH, VOUT is set by VSEL1. When LOW, VOUT is set by VSEL0. This behavior
can be overridden through I2C register settings. This pin should not be left floating.
VIN
SDA
Input Voltage. Connect to input power source. The connection from this pin to CIN should be as short as
possible.
SDA. I2C interface serial data. This pin should not be left floating.
SW Switching Node. Connect to output inductor.
SCL SCL. I2C interface serial clock. This pin should not be left floating.
EN
Enable. When this pin is HIGH, the circuit is enabled. When LOW, part enters shutdown mode and
input current is minimized. This pin should not be left floating.
VOUT
Output Voltage Monitor. Tie this pin to the output voltage at COUT. This is a signal input pin to the
control circuit and does not carry DC current.
PGND
Power GND. Power return for gate drive and power transistors. Connect to AGND on PCB. The
connection from this pin to the bottom of CIN should be as short as possible.
AGND
Analog GND. This is the signal ground reference for the IC. All voltage levels are measured with
respect to this pin. AGND should be connected to PGND at a single point.
© 2008 Fairchild Semiconductor Corporation
FAN5365 • Rev. 1.0.4
3
www.fairchildsemi.com
Share Link: 