DM9103 データシートの表示（PDF） - Davicom Semiconductor, Inc.

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DM9103

10/100 Mbps 3-port Ethernet Switch Controller with PCI Interface

Davicom Semiconductor, Inc. 

DM9103

3-port switch with PCI Interface

9.1.1. Overview .................................................................................................................................................... 59

9.1.2. Data Structure and Descriptor List ............................................................................................................. 59

9.1.3. Buffer Management : Ring Structure Method............................................................................................. 59

9.1.4. Buffer Management : Chain Structure Method ........................................................................................... 59

9.1.5. Descriptor List: Buffer Descriptor Format ................................................................................................... 60

9.1.2. Transmit Data Buffer Processing ............................................................................................................... 67

9.2 Switch function: .................................................................................................................................. 68

9.2.1 Address Learning ........................................................................................................................................ 68

9.2.2 Address Aging............................................................................................................................................. 68

9.2.3 Packet Forwarding ...................................................................................................................................... 68

9.2.4 Inter-Packet Gap (IPG) ............................................................................................................................... 68

9.2.5 Back-off Algorithm....................................................................................................................................... 68

9.2.6 Late Collision .............................................................................................................................................. 68

9.2.7 Half Duplex Flow Control ............................................................................................................................ 68

9.2.8 Full Duplex Flow Control ............................................................................................................................. 68

9.2.9 Partition Mode ............................................................................................................................................. 68

9.2.10 Broadcast Storm Filtering.......................................................................................................................... 69

9.2.11 Bandwidth Control..................................................................................................................................... 69

9.2.12 Port Monitoring Support ............................................................................................................................ 69

9.2.13 VLAN Support ........................................................................................................................................... 70

9.2.13.1 Port-Based VLAN................................................................................................................................... 70

9.2.13.2 802.1Q-Based VLAN.............................................................................................................................. 70

9.2.13.3 Tag/Untag .............................................................................................................................................. 70

9.2.14 Priority Support ......................................................................................................................................... 70

9.2.14.1 Port-Based Priority ................................................................................................................................. 71

9.2.14.2 802.1p-Based Priority............................................................................................................................. 71

9.2.14.3 DiffServ-Based Priority........................................................................................................................... 71

9.3 MII Interface........................................................................................................................................ 72

9.3.1 MII data interface ........................................................................................................................................ 72

9.3.2 MII Serial Management ............................................................................................................................... 72

9.3.3 Serial Management Interface ...................................................................................................................... 73

9.3.4 Management Interface - Read Frame Structure.......................................................................................... 73

9.3.5 Management Interface - Write Frame Structure .......................................................................................... 73

9.4 Internal PHY functions........................................................................................................................ 74

Preliminary datasheet

5

DM9103-DS-P02

September 26, 2007

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