LC680100A データシートの表示（PDF） - SANYO -> Panasonic

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LC680100A

32-Bit RISC Microcontroller

SANYO -> Panasonic 

System Block Diagram

LC680100A

Main OSC

Multiplier Circuit

RC OSC

Instruction Cache

(2k bytes)

Instruction Cache

Control

System Clock, Standby

Control

Mode Control

Reset Control

32bit

RISC

CORE

Data RAM

(2k bytes)

Bus

Control

Coprocessor

(Multiplier)

Interrupt Control

Interrupt enable

control

TM0H

TM0L

TM1H

TM2H

TM3H

SIO0

UART0

UART1

Timer 0

Timer 1

Timer 2

Timer 3

DRAM

Control

Special Function Register

SFR Bus Control

SIO0

UART0

UART1

Port 0

Port 1

Figure 1 LC680100A System Block Diagram

No.6830-2/16

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