AN-9050 データシートの表示（PDF） - Fairchild Semiconductor
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AN-9050 Datasheet PDF : 7 Pages
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APP NOTE NUMBER
FDMF6704 Ploss Calculation Tool
In order to get quick and accurate performance estimation,
the automatic power loss calculation tool was developed
using concepts mentioned in the previous paragraph. The
calculator excel file can be used for estimating FDMF6704
performance regarding power loss and efficiency. Figure 9
shows the table for parameter input. The yellow cells are
user input parameters and the blue cells are calculated
parameters by internal logic of excel file. Once the user
inputs parameter value into the yellow cells, the sheet
automatically calculates power loss, efficiency and module
temperature, and also generates performance related charts.
Note that each user input parameter has a minimum input
step. For example, the “VIN” parameter has input range
from 5 V to 16 V with 0.5 V step. The “Recommended
OUTL” parameter shows a calculated inductor value
according to other parameter input. The user can enter this
“Recommended OUTL” value into the yellow “OUTL
Value” cell. The “Δ IL Ratio Value” depends on application
design related to output voltage ripple. The user inputs this
value from 20 % to 30 % of Iout for normal Sync Buck
application.
APPLICATION NOTE
Figure 11 shows a chart which depicts the calculated
efficiency and power loss at module. The user is able to use
this chart on another document by copying and pasting.
Calculated SW Node Efficiency and Ploss
100
14
95
12
90
10
85
8
80
75
6
70
4
65
60
0
EFFI@SW [%]
2
PD_MOD [W]
0
5
10
15
20
25
30
35
40
Iout [A]
Figure 11. Calculated Efficiency and Power Loss Chart
Figure 12 is another example of a chart for module
temperature. This chart can be also copied or pasted for end
user documentation.
Calculated Module Case Top Temp. and Ploss
Figure 9. Input Parameters of Ploss Calculation Tool
Figure 10 is a table which is generated by input parameter
values. All design parameters, input/output powers,
efficiencies and module case top temperature are generated
automatically. The red values mean a warning for over-
specification of FDMF6704 maximum current and module
temperature. For example, current of 35 A would make
10.93 W module power loss and 145 C module case top
temperature. The user should consider specification of
FDMF6704 and application when using this design tool.
140
14
120
12
100
10
80
8
60
6
40
4
20
0
0
MOD_TEMP [C] 2
PD_MOD [W]
0
5
10
15
20
25
30
35
40
Iout [A]
Figure 12. Calculated Module Temp. and Ploss Chart
Figure 10. Calculated Power Loss and Efficiency
© 2007 Fairchild Semiconductor Corporation
Rev. 1.0.0 • 7/14/09
The data used for this tool is based on a real lab test data,
and the models of each parameter are extracted with multi
element polynomial equations. So its accuracy is good
enough to check brief power loss related to performance of
FDMF6704. Typical power loss calculation error of this
tool at max load is under 5 % compared to real data. Note
that some application at various customers would show
different performance, if their application circuit,
components, board layout and structure are significantly
different from Fairchild evaluation board environment. The
internal parameters, equations and calculating logic are
Fairchild confidential since they are directly related to the
HS FET, LS FET and gate driver electrical characteristics.
The locked version of FDMF6704 power loss calculator
www.fairchildsemi.com
5
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