EBD21RD4ABNA-10 データシートの表示（PDF） - Elpida Memory, Inc

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EBD21RD4ABNA-10

2GB Registered DDR SDRAM DIMM

Elpida Memory, Inc 

EBD21RD4ABNA

DC Characteristics 1 (TA = 0 to 70°C, VDD, VDDQ = 2.5V ± 0.2V, VSS = 0V)

Parameter

Symbol

Grade

max.

Unit

Test condition

Notes

Operating current (ACTV-PRE) IDD0

Operating current

(ACTV-READ-PRE)

IDD1

-7A, -7B

-10

-7A, -7B

-10

3830

3550

4190

3910

mA

CKE ≥ VIH,

tRC = tRC (min.)

1, 2, 9

mA

CKE ≥ VIH, BL = 4,

CL = 3.5, tRC = tRC (min.)

1, 2, 5

Idle power down standby current IDD2P

Floating idle

Standby current

Quiet idle

Standby current

IDD2F

IDD2Q

-7A, -7B

-10

-7A, -7B

-10

-7A, -7B

-10

427

420

1580

1390

1220

1210

mA

CKE ≤ VIL

4

mA

CKE ≥ VIH, /CS ≥ VIH

DQ, DQS, DM = VREF

4, 5

mA

CKE ≥ VIH, /CS ≥ VIH

DQ, DQS, DM = VREF

4, 10

Active power down standby

current

Active standby current

Operating current

(Burst read operation)

Operating current

(Burst write operation)

IDD3P

IDD3N

IDD4R

IDD4W

-7A, -7B

-10

-7A, -7B

-10

-7A, -7B

-10

-7A, -7B

-10

1040

1030

2480

2290

4460

3820

4460

3820

mA

CKE ≤ VIL

3

mA

CKE ≥ VIH, /CS ≥ VIH

tRAS = tRAS (max.)

3, 5, 6

mA

CKE ≥ VIH, BL = 2,

CL = 3.5

1, 2, 5, 6

mA

CKE ≥ VIH, BL = 2,

CL = 3.5

1, 2, 5, 6

Auto refresh current

Self refresh current

IDD5

IDD6

-7A, -7B

-10

-7A, -7B

-10

6260

5800

463

457

mA

tRFC = tRFC (min.),

Input ≤ VIL or ≥ VIH

mA

Input ≥ VDD – 0.2 V

Input ≤ 0.2 V

Operating current

(4 banks interleaving)

IDD7A

-7A, -7B

-10

7880

7240

mA

BL = 4

5, 6, 7

Notes. 1. These IDD data are measured under condition that DQ pins are not connected.

2. One bank operation.

3. One bank active.

4. All banks idle.

5. Command/Address transition once per one cycle.

6. Data/Data mask transition twice per one cycle.

7. 4 banks active. Only one bank is running at tRC = tRC (min.)

8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.

9. Command/Address transition once per one every two clock cycles.

10. Command/Address stable at ≥ VIH or ≤ VIL.

DC Characteristics 2 (TA = 0 to 70°C, VDD, VDDQ = 2.5V ± 0.2V, VSS = 0V)

Parameter

Input leakage current

Output leakage current

Output high current

Output low current

Symbol

IL

IOZ

IOH

IOL

min.

–2

–5

–15.2

15.2

max.

2

5

—

—

Unit

Test condition

µA

VDD ≥ VIN ≥ VSS

µA

VDDQ ≥ VOUT ≥ VSS

mA

VOUT = 1.95V

mA

VOUT = 0.35V

Notes

Preliminary Data Sheet E0273E20 (Ver. 2.0)

11

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