ADIS16251(RevPrA) データシートの表示（PDF） - Analog Devices
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ADIS16251 Datasheet PDF : 20 Pages
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Preliminary Technical Data
Data-Ready I/O Indicator
The data-ready function provides an indication of updated
output data. The MSC_CTRL control register provides the
opportunity to configure either of the general-purpose I/O pins
(DIO0 and DIO1) as a data-ready indicator signal.
Table 26. MSC_CTRL Register Definition
Address
Default
Format
0x35, 0x34
0x0000
N/A
Access
R/W
Table 27. MSC_CTRL Bit Descriptions
Bit
Description
15:11 Not used
10
Internal self-test enable: 1 = enabled, 0 = disabled.
9
External negative rotation self-test enable
1 = enabled, 0 = disabled.
8
External positive rotation self-test enable
1 = enabled, 0 = disabled.
7:3
Not used
2
Data-ready enable: 1 = enabled, 0 = disabled
1
Data-ready polarity: 1 = active high, 0 = active low
0
Data-ready line select:1 = DIO1, 0 = DIO0
Self Test
The MSC_CTRL register also provides a self-test function,
which verifies the MEMS sensor’s mechanical integrity. There
are two different self-test options: (1) internal self-test and (2)
external self-test. The internal test provides a simple, two-step
process for checking the MEMS sensor: (1) start the process by
writing a 1 to Bit 10 in the MSC_CTRL register and (2) check
the result by reading Bit 5 of the STATUS register.
The external self-test is a static condition that can be enabled
and disabled. In this test, both positive and negative MEMS
sensor movements are available. After writing to the
appropriate control bit, the GYRO_OUT register reflects the
changes after a delay that reflects the sensor signal chain
response time. For example, the standard 49 Hz bandwidth
reflects an exponential response with a time constant of 2 ms.
The appropriate bit definitions for self-test are listed in Table 26
and Table 27.
Status Conditions
The STATUS register contains the following error-condition
flags: Alarm conditions, self-test status, angular rate over range,
SPI communication failure, control register update failure, and
power supply out of range. See Table 28 and Table 29 for the
appropriate register access and bit assignment for each flag.
The bits assigned for checking power supply range and angular
rate over range automatically reset to zero when the error
condition no longer exists. The remaining error-flag bits in the
STATUS register require a read in order to return them to zero.
Note that a STATUS register read clears all of the bits to 0.
ADIS16251
Table 28. STATUS Register Definition
Address
Default
Format
0x3D, 0x3C 0x0000
N/A
Access
Read only
Table 29. STATUS Bit Descriptions
Bit Description
15:10 Not used
9
Alarm 2 status: 1 = active, 0 = inactive
8
Alarm 1 status: 1 = active, 0 = inactive
7:6 Not used
5
Self-test diagnostic error flag
1 = error condition, 0 = normal operation
4
Angular rate over range
1 = error condition, 0 = normal operation
3
SPI communications failure
1 = error condition, 0 = normal operation
2
Control register update failed
1 = error condition, 0 = normal operation
1
Power supply in range above 5.25 V
1 = above 5.25 V, 0 = below 5.25V (normal)
0
Power supply below 4.75 V
1 = below 4.75 V, 0 = above 4.75V (normal)
Flash Memory Endurance
The ENDURANCE register maintains a running count of
writes to the Flash memory.
Table 30. ENDURANCE Register Definition
Address
Default
Format
0x01, 0x00
N/A
Binary
Access
R
Alarms
The ADIS16251 provides two independent alarm options for
event detection. Event detections occur when output register
data meets the configured conditions. Configuration options are:
• All output data registers are available for monitoring
as the source data
• The source data can be filtered or unfiltered
• Comparisons can be static or dynamic (rate of change)
• The threshold levels and times are configurable
• Comparison can be greater than or less than
The ALM_MAG1 register and ALM_MAG2 register establish
the threshold level for detecting events. They take on the format
of the source data and provide a bit for establishing the greater
than/less than comparison direction. When making dynamic
comparisons, the ALM_SMPL1 register and the ALM_SMPL2
register establish the number of averages taken for the source
data as a reference for comparison. In this configuration, each
subsequent source data sample is subtracted from the previous
one, establishing an instantaneous delta.
Rev. PrA | Page 17 of 20
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