UPD4990AC データシートの表示（PDF） - NEC => Renesas Technology

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UPD4990AC

SERIAL I/O CALENDAR & CLOCK CMOS LSI

NEC => Renesas Technology 

µPD4990A

TERMINALS

• Input terminals

° DATA IN

° CLK

° C0, C1, C2

° STB

° CS

° OUT ENBL

Data input of 40-/52-bit shift register

Shift clock input of 40-/52-bit shift register

Command input (3 bit)

Strobe input

Chip select input (Prohibits CLK & STB)

Output control input (Makes the DATA OUT high impedance by inputting low level).

• Output terminals (N-channel Open Drain)

° DATA OUT

° TP

Data output of 40-/52-bit shift register

Timing pulse output

• Oscillation terminals

° XTAL

° XTAL

Oscillation inverter input (OSC IN)

Oscillation inverter output (OSC OUT)

• Power supply terminals

° VDD

° GND (VSS)

Plus power supply

Common line

5

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