T15V2M16B データシートの表示（PDF） - Taiwan Memory Technology

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T15V2M16B

128K X 16 LOW POWER CMOS STATIC RAM

Taiwan Memory Technology 

tm TE

CH

T15V2M16B

CAPACITANCE

(f = 1 MHz, Ta = 25°C,)

PARAMETER

Input Capacitance

Input/ Output Capacitance

SYMBOL

CIN

CI/O

CONDITION

VIN = 0V

VIN = VOUT= 0V

MAX.

8

10

Note: This parameter is guaranteed by device characterization and is not production tested.

UNIT

pF

pF

AC TEST CONDITIONS

PARAMETER

Input Pulse Levels

Input Rise and Fall Times

Input and Output Timing Reference Level

Output Load

CONDITIONS

0.6V to 0.7Vcc

3.0 ns

1.4V

CL =30pF+1TTL Load(45/55/70ns)

CL =100pF+1TTL Load(Load for 100ns)

AC TEST LOADS AND WAVEFORM

TTL

DQ

CL*

Fig.A * Including Scope and Jig Capacitance

Z0 = 50 ohm

RL

50 ohm

Vt =1.4V

CL

30 pF

Fig.B Output Load Equivalent

TM Technology Inc. reserves the right

P. 5

to change products or specifications without notice.

Publication Date: NOV. 2002

Revision:A

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