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MAX4581 データシートの表示(PDF) - Maxim Integrated

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MAX4581 Datasheet PDF : 18 Pages
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Low-Voltage, CMOS Analog
Multiplexers/Switches
Table 1. Truth Table/Switch Programming
ENABLE
INPUT
SELECT INPUTS
C*
B
A
MAX4581
ON SWITCHES
MAX4582
MAX4583
H
X
X
X
All switches open
All switches open
All switches open
L
L
L
L
X–X0
X–X0,
Y–Y0
X–X0,
Y–Y0,
Z–Z0
L
L
L
H
X–X1
X–X1,
Y–Y1
X–X1,
Y–Y0,
Z–Z0
L
L
H
L
X–X2
X–X2,
Y–Y2
X–X0,
Y–Y1,
Z–Z0
L
L
H
H
X–X3
X–X3,
Y–Y3
X–X1,
Y–Y1,
Z–Z0
L
H
L
L
X–X4
X–X0,
Y–Y0
X–X0,
Y–Y0,
Z–Z1
L
H
L
H
X–X5
X–X1,
Y–Y1
X–X1,
Y–Y0,
Z–Z1
L
H
H
L
X–X6
X–X2,
Y–Y2
X–X0,
Y–Y1,
Z–Z1
L
H
H
H
X–X7
X–X3,
Y–Y3
X–X1,
Y–Y1,
Z–Z1
X = Don’t care
*C not present on MAX4582.
Note: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally
well in either direction.
will conduct. During normal operation, these and other
reverse-biased ESD diodes leak, forming the only cur-
rent drawn from VCC or VEE.
Virtually all the analog leakage current comes from the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
either VCC or VEE and the analog signal. This means
their leakages will vary as the signal varies. The differ-
ence in the two diode leakages to the VCC and VEE
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. This is why both sides of a given switch can
show leakage currents of either the same or opposite
polarity.
There is no connection between the analog-signal
paths and GND.
VCC and GND power the internal logic and logic-level
translators, and set the input logic limits. The logic-level
translators convert the logic levels into switched VCC
and VEE signals to drive the gates of the analog sig-
nals. This drive signal is the only connection between
the logic supplies and signals and the analog supplies.
VCC and VEE have ESD-protection diodes to GND.
The logic-level thresholds are TTL/CMOS compatible
when VCC is +5V. As VCC rises, the threshold increases
_______________________________________________________________________________________ 9

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