CS5451A データシートの表示（PDF） - Cirrus Logic
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CS5451A Datasheet PDF : 14 Pages
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CS5451A
ANALOG CHARACTERISITCS (continued)
Parameter
Symbol Min Typ Max Unit
Reference Output
Output Voltage
REFOUT 1.15
-
1.25
V
Temperature Coefficient
-
25
50 ppm/°C
Load Regulation
(Output Current 1 µA Source or Sink)
∆VR
-
6
10
mV
Power Supply Rejection
PSRR
60
-
-
dB
Reference Input
Input Voltage Range
VREF+
1.15 1.2 1.25
V
Input Capacitance
-
-
10
pF
Input CVF Current
-
-
1
µA
Power Supplies
Power Supply Currents
IA+ PSCA
-
-
3
mA
ID+ PSCD
-
-
4
mA
Power Consumption
(Note 3)
PC
-
-
27 mW
Power Supply Rejection
(see Note 4)
(DC) PSRR
50
-
(50, 60 Hz) PSRR
60
-
-
dB
-
dB
Notes: 3. All outputs unloaded. All inputs CMOS level.
4. Definition for PSRR: VREFIN tied to VREFOUT, VA+ = VD+ = 3V, AGND = DGND = 0V, VA- = - 2V
(using charge-pump circuit with CPD). In addition, a 106.0 7mV rms (60 Hz) sinewave is imposed onto
the VA+ and VD+ pins. The “+” and “-” input pins of both input channels are shorted to VA-. 2048
instantaneous digital output data words are collected for the channel under test. The rms value of the
digital sinusoidal output signal is calculated, and this rms value is converted into the rms value of the
sinusoidal voltage (measured in mV) that would need to be applied at the channel’s inputs, in order to
cause the same digital sinusoidal output. This voltage is then defined as Veq. PSRR is then (in dB):
PSRR
=
20
⋅
log
-1--0---6---.--0---7-
Veq
DIGITAL CHARACTERISTICS (See Note 5)
Parameter
High-Level Input Voltage
Low-Level Input Voltage
High-Level Output Voltage
Low-Level Output Voltage
Input Leakage Current
3-State Leakage Current
Digital Output Pin Capacitance
Symbol
Min
Typ
Iout = -5.0 mA
VIH
VIL
VOH
0.6 VD+
-
0.0
-
(VD+) - 1.0 -
Iout = 5.0 mA
VOL
-
-
(Note 6)
Iin
IOZ
Cout
-
±1
-
-
-
9
Max
VD+
0.8
-
0.4
±10
±10
-
Unit
V
V
V
V
µA
µA
pF
Notes: 5. All measurements performed under static conditions.
6. For OWRS and GAIN pins, input leakage current is 30 µA (Max).
6
DS635PP1
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